| Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Stefan Roese <sr@denx.de> |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _CONFIG_DB_88F6820_AMC_H |
| 7 | #define _CONFIG_DB_88F6820_AMC_H |
| 8 | |
| 9 | /* |
| 10 | * High Level Configuration Options (easy to change) |
| 11 | */ |
| 12 | |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 13 | #define CONFIG_SYS_TCLK 200000000 /* 200MHz */ |
| 14 | |
| 15 | /* |
| 16 | * Commands configuration |
| 17 | */ |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 18 | |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 19 | /* USB/EHCI configuration */ |
| 20 | #define CONFIG_EHCI_IS_TDI |
| 21 | |
| 22 | /* Environment in SPI NOR flash */ |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 23 | #define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ |
| 24 | #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ |
| 25 | #define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ |
| 26 | |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 27 | #define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ |
| 28 | |
| 29 | /* PCIe support */ |
| 30 | #ifndef CONFIG_SPL_BUILD |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 31 | #define CONFIG_PCI_SCAN_SHOW |
| 32 | #endif |
| 33 | |
| Chris Packham | 42f7505 | 2016-09-22 12:56:15 +1200 | [diff] [blame] | 34 | /* NAND */ |
| Chris Packham | 42f7505 | 2016-09-22 12:56:15 +1200 | [diff] [blame] | 35 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
| 36 | |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 37 | /* Keep device tree and initrd in lower memory so the kernel can access them */ |
| 38 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 39 | "fdt_high=0x10000000\0" \ |
| 40 | "initrd_high=0x10000000\0" |
| 41 | |
| 42 | /* SPL */ |
| 43 | /* |
| 44 | * Select the boot device here |
| 45 | * |
| 46 | * Currently supported are: |
| 47 | * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash |
| 48 | * |
| 49 | * MMC is not populated on this board. |
| 50 | * NAND support may be added in the future. |
| 51 | */ |
| 52 | #define SPL_BOOT_SPI_NOR_FLASH 1 |
| 53 | #define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH |
| 54 | |
| 55 | /* Defines for SPL */ |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 56 | #define CONFIG_SPL_SIZE (140 << 10) |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 57 | #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) |
| 58 | |
| 59 | #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) |
| 60 | #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) |
| 61 | |
| 62 | #ifdef CONFIG_SPL_BUILD |
| 63 | #define CONFIG_SYS_MALLOC_SIMPLE |
| 64 | #endif |
| 65 | |
| 66 | #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) |
| 67 | #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) |
| 68 | |
| 69 | #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH |
| 70 | /* SPL related SPI defines */ |
| Chris Packham | c0def24 | 2016-09-22 12:56:14 +1200 | [diff] [blame] | 71 | #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS |
| 72 | #endif |
| 73 | |
| 74 | /* |
| 75 | * mv-common.h should be defined after CMD configs since it used them |
| 76 | * to enable certain macros |
| 77 | */ |
| 78 | #include "mv-common.h" |
| 79 | #undef CONFIG_SYS_MAXARGS |
| 80 | #define CONFIG_SYS_MAXARGS 96 |
| 81 | |
| 82 | #endif /* _CONFIG_DB_88F6820_AMC_H */ |