| Mario Six | d216631 | 2018-08-06 10:23:46 +0200 | [diff] [blame^] | 1 | MPC83xx SerDes controller devices |
| 2 | |
| 3 | MPC83xx SoCs contain a built-in SerDes controller that determines which |
| 4 | protocols (SATA, PCI Express, SGMII, ...) are used on the system's serdes lines |
| 5 | and how the lines are configured. |
| 6 | |
| 7 | Required properties: |
| 8 | - compatible: must be "fsl,mpc83xx-serdes" |
| 9 | - reg: must point to the serdes controller's register map |
| 10 | - proto: selects for which protocol the serdes lines are configured. One of |
| 11 | "sata", "pex", "pex-x2", "sgmii" |
| 12 | - serdes-clk: determines the frequency the serdes lines are configured for. One |
| 13 | of 100, 125, 150. |
| 14 | - vdd: determines whether 1.0V core VDD is used or not |
| 15 | |
| 16 | Example: |
| 17 | |
| 18 | SERDES: serdes@e3000 { |
| 19 | reg = <0xe3000 0x200>; |
| 20 | compatible = "fsl,mpc83xx-serdes"; |
| 21 | proto = "pex"; |
| 22 | serdes-clk = <100>; |
| 23 | vdd; |
| 24 | }; |