Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008, Freescale Semiconductor, Inc |
| 3 | * Andy Fleming |
| 4 | * |
| 5 | * Based vaguely on the Linux code |
| 6 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <config.h> |
| 11 | #include <common.h> |
| 12 | #include <command.h> |
| 13 | #include <mmc.h> |
| 14 | #include <part.h> |
| 15 | #include <malloc.h> |
| 16 | #include <linux/list.h> |
Rabin Vincent | 9b1f942 | 2009-04-05 13:30:54 +0530 | [diff] [blame] | 17 | #include <div64.h> |
Paul Burton | da61fa5 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 18 | #include "mmc_private.h" |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 19 | |
| 20 | static struct list_head mmc_devices; |
| 21 | static int cur_dev_num = -1; |
| 22 | |
Nikita Kiryanov | d23d8d7 | 2012-12-03 02:19:46 +0000 | [diff] [blame] | 23 | int __weak board_mmc_getwp(struct mmc *mmc) |
| 24 | { |
| 25 | return -1; |
| 26 | } |
| 27 | |
| 28 | int mmc_getwp(struct mmc *mmc) |
| 29 | { |
| 30 | int wp; |
| 31 | |
| 32 | wp = board_mmc_getwp(mmc); |
| 33 | |
Peter Korsgaard | d4e1da4 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 34 | if (wp < 0) { |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 35 | if (mmc->cfg->ops->getwp) |
| 36 | wp = mmc->cfg->ops->getwp(mmc); |
Peter Korsgaard | d4e1da4 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 37 | else |
| 38 | wp = 0; |
| 39 | } |
Nikita Kiryanov | d23d8d7 | 2012-12-03 02:19:46 +0000 | [diff] [blame] | 40 | |
| 41 | return wp; |
| 42 | } |
| 43 | |
Thierry Reding | 314284b | 2012-01-02 01:15:36 +0000 | [diff] [blame] | 44 | int __board_mmc_getcd(struct mmc *mmc) { |
Stefano Babic | 11fdade | 2010-02-05 15:04:43 +0100 | [diff] [blame] | 45 | return -1; |
| 46 | } |
| 47 | |
Thierry Reding | 314284b | 2012-01-02 01:15:36 +0000 | [diff] [blame] | 48 | int board_mmc_getcd(struct mmc *mmc)__attribute__((weak, |
Stefano Babic | 11fdade | 2010-02-05 15:04:43 +0100 | [diff] [blame] | 49 | alias("__board_mmc_getcd"))); |
| 50 | |
Paul Burton | da61fa5 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 51 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 52 | { |
Raffaele Recalcati | 5db2fe3 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 53 | int ret; |
Marek Vasut | 8635ff9 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 54 | |
Marek Vasut | 8635ff9 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 55 | #ifdef CONFIG_MMC_TRACE |
Raffaele Recalcati | 5db2fe3 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 56 | int i; |
| 57 | u8 *ptr; |
| 58 | |
| 59 | printf("CMD_SEND:%d\n", cmd->cmdidx); |
| 60 | printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 61 | ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); |
Raffaele Recalcati | 5db2fe3 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 62 | switch (cmd->resp_type) { |
| 63 | case MMC_RSP_NONE: |
| 64 | printf("\t\tMMC_RSP_NONE\n"); |
| 65 | break; |
| 66 | case MMC_RSP_R1: |
| 67 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", |
| 68 | cmd->response[0]); |
| 69 | break; |
| 70 | case MMC_RSP_R1b: |
| 71 | printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", |
| 72 | cmd->response[0]); |
| 73 | break; |
| 74 | case MMC_RSP_R2: |
| 75 | printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", |
| 76 | cmd->response[0]); |
| 77 | printf("\t\t \t\t 0x%08X \n", |
| 78 | cmd->response[1]); |
| 79 | printf("\t\t \t\t 0x%08X \n", |
| 80 | cmd->response[2]); |
| 81 | printf("\t\t \t\t 0x%08X \n", |
| 82 | cmd->response[3]); |
| 83 | printf("\n"); |
| 84 | printf("\t\t\t\t\tDUMPING DATA\n"); |
| 85 | for (i = 0; i < 4; i++) { |
| 86 | int j; |
| 87 | printf("\t\t\t\t\t%03d - ", i*4); |
Dirk Behme | 146bec7 | 2012-03-08 02:35:34 +0000 | [diff] [blame] | 88 | ptr = (u8 *)&cmd->response[i]; |
Raffaele Recalcati | 5db2fe3 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 89 | ptr += 3; |
| 90 | for (j = 0; j < 4; j++) |
| 91 | printf("%02X ", *ptr--); |
| 92 | printf("\n"); |
| 93 | } |
| 94 | break; |
| 95 | case MMC_RSP_R3: |
| 96 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", |
| 97 | cmd->response[0]); |
| 98 | break; |
| 99 | default: |
| 100 | printf("\t\tERROR MMC rsp not supported\n"); |
| 101 | break; |
| 102 | } |
Raffaele Recalcati | 5db2fe3 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 103 | #else |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 104 | ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); |
Raffaele Recalcati | 5db2fe3 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 105 | #endif |
Marek Vasut | 8635ff9 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 106 | return ret; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 107 | } |
| 108 | |
Paul Burton | da61fa5 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 109 | int mmc_send_status(struct mmc *mmc, int timeout) |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 110 | { |
| 111 | struct mmc_cmd cmd; |
Jan Kloetzke | d617c42 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 112 | int err, retries = 5; |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 113 | #ifdef CONFIG_MMC_TRACE |
| 114 | int status; |
| 115 | #endif |
| 116 | |
| 117 | cmd.cmdidx = MMC_CMD_SEND_STATUS; |
| 118 | cmd.resp_type = MMC_RSP_R1; |
Marek Vasut | aaf3d41 | 2011-08-10 09:24:48 +0200 | [diff] [blame] | 119 | if (!mmc_host_is_spi(mmc)) |
| 120 | cmd.cmdarg = mmc->rca << 16; |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 121 | |
| 122 | do { |
| 123 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Jan Kloetzke | d617c42 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 124 | if (!err) { |
| 125 | if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && |
| 126 | (cmd.response[0] & MMC_STATUS_CURR_STATE) != |
| 127 | MMC_STATE_PRG) |
| 128 | break; |
| 129 | else if (cmd.response[0] & MMC_STATUS_MASK) { |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 130 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Jan Kloetzke | d617c42 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 131 | printf("Status Error: 0x%08X\n", |
| 132 | cmd.response[0]); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 133 | #endif |
Jan Kloetzke | d617c42 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 134 | return COMM_ERR; |
| 135 | } |
| 136 | } else if (--retries < 0) |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 137 | return err; |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 138 | |
| 139 | udelay(1000); |
| 140 | |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 141 | } while (timeout--); |
| 142 | |
Raffaele Recalcati | 5db2fe3 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 143 | #ifdef CONFIG_MMC_TRACE |
| 144 | status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; |
| 145 | printf("CURR STATE:%d\n", status); |
| 146 | #endif |
Jongman Heo | 5b0c942 | 2012-06-03 21:32:13 +0000 | [diff] [blame] | 147 | if (timeout <= 0) { |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 148 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 149 | printf("Timeout waiting card ready\n"); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 150 | #endif |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 151 | return TIMEOUT; |
| 152 | } |
| 153 | |
| 154 | return 0; |
| 155 | } |
| 156 | |
Paul Burton | da61fa5 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 157 | int mmc_set_blocklen(struct mmc *mmc, int len) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 158 | { |
| 159 | struct mmc_cmd cmd; |
| 160 | |
Jaehoon Chung | d22e3d4 | 2014-05-16 13:59:54 +0900 | [diff] [blame^] | 161 | if (mmc->card_caps & MMC_MODE_DDR_52MHz) |
| 162 | return 0; |
| 163 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 164 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; |
| 165 | cmd.resp_type = MMC_RSP_R1; |
| 166 | cmd.cmdarg = len; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 167 | |
| 168 | return mmc_send_cmd(mmc, &cmd, NULL); |
| 169 | } |
| 170 | |
| 171 | struct mmc *find_mmc_device(int dev_num) |
| 172 | { |
| 173 | struct mmc *m; |
| 174 | struct list_head *entry; |
| 175 | |
| 176 | list_for_each(entry, &mmc_devices) { |
| 177 | m = list_entry(entry, struct mmc, link); |
| 178 | |
| 179 | if (m->block_dev.dev == dev_num) |
| 180 | return m; |
| 181 | } |
| 182 | |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 183 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 184 | printf("MMC Device %d not found\n", dev_num); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 185 | #endif |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 186 | |
| 187 | return NULL; |
| 188 | } |
| 189 | |
Sascha Silbe | ff8fef5 | 2013-06-14 13:07:25 +0200 | [diff] [blame] | 190 | static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 191 | lbaint_t blkcnt) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 192 | { |
| 193 | struct mmc_cmd cmd; |
| 194 | struct mmc_data data; |
| 195 | |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 196 | if (blkcnt > 1) |
| 197 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; |
| 198 | else |
| 199 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 200 | |
| 201 | if (mmc->high_capacity) |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 202 | cmd.cmdarg = start; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 203 | else |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 204 | cmd.cmdarg = start * mmc->read_bl_len; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 205 | |
| 206 | cmd.resp_type = MMC_RSP_R1; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 207 | |
| 208 | data.dest = dst; |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 209 | data.blocks = blkcnt; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 210 | data.blocksize = mmc->read_bl_len; |
| 211 | data.flags = MMC_DATA_READ; |
| 212 | |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 213 | if (mmc_send_cmd(mmc, &cmd, &data)) |
| 214 | return 0; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 215 | |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 216 | if (blkcnt > 1) { |
| 217 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
| 218 | cmd.cmdarg = 0; |
| 219 | cmd.resp_type = MMC_RSP_R1b; |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 220 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 221 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 222 | printf("mmc fail to send stop cmd\n"); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 223 | #endif |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 224 | return 0; |
| 225 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 226 | } |
| 227 | |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 228 | return blkcnt; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 229 | } |
| 230 | |
Sascha Silbe | ff8fef5 | 2013-06-14 13:07:25 +0200 | [diff] [blame] | 231 | static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 232 | { |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 233 | lbaint_t cur, blocks_todo = blkcnt; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 234 | |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 235 | if (blkcnt == 0) |
| 236 | return 0; |
| 237 | |
| 238 | struct mmc *mmc = find_mmc_device(dev_num); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 239 | if (!mmc) |
| 240 | return 0; |
| 241 | |
Lei Wen | d2bf29e | 2010-09-13 22:07:27 +0800 | [diff] [blame] | 242 | if ((start + blkcnt) > mmc->block_dev.lba) { |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 243 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Sascha Silbe | ff8fef5 | 2013-06-14 13:07:25 +0200 | [diff] [blame] | 244 | printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", |
Lei Wen | d2bf29e | 2010-09-13 22:07:27 +0800 | [diff] [blame] | 245 | start + blkcnt, mmc->block_dev.lba); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 246 | #endif |
Lei Wen | d2bf29e | 2010-09-13 22:07:27 +0800 | [diff] [blame] | 247 | return 0; |
| 248 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 249 | |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 250 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 251 | return 0; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 252 | |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 253 | do { |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 254 | cur = (blocks_todo > mmc->cfg->b_max) ? |
| 255 | mmc->cfg->b_max : blocks_todo; |
Alagu Sankar | 4a1a06b | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 256 | if(mmc_read_blocks(mmc, dst, start, cur) != cur) |
| 257 | return 0; |
| 258 | blocks_todo -= cur; |
| 259 | start += cur; |
| 260 | dst += cur * mmc->read_bl_len; |
| 261 | } while (blocks_todo > 0); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 262 | |
| 263 | return blkcnt; |
| 264 | } |
| 265 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 266 | static int mmc_go_idle(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 267 | { |
| 268 | struct mmc_cmd cmd; |
| 269 | int err; |
| 270 | |
| 271 | udelay(1000); |
| 272 | |
| 273 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; |
| 274 | cmd.cmdarg = 0; |
| 275 | cmd.resp_type = MMC_RSP_NONE; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 276 | |
| 277 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 278 | |
| 279 | if (err) |
| 280 | return err; |
| 281 | |
| 282 | udelay(2000); |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 287 | static int sd_send_op_cond(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 288 | { |
| 289 | int timeout = 1000; |
| 290 | int err; |
| 291 | struct mmc_cmd cmd; |
| 292 | |
| 293 | do { |
| 294 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 295 | cmd.resp_type = MMC_RSP_R1; |
| 296 | cmd.cmdarg = 0; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 297 | |
| 298 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 299 | |
| 300 | if (err) |
| 301 | return err; |
| 302 | |
| 303 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; |
| 304 | cmd.resp_type = MMC_RSP_R3; |
Stefano Babic | 250de12 | 2010-01-20 18:20:39 +0100 | [diff] [blame] | 305 | |
| 306 | /* |
| 307 | * Most cards do not answer if some reserved bits |
| 308 | * in the ocr are set. However, Some controller |
| 309 | * can set bit 7 (reserved for low voltages), but |
| 310 | * how to manage low voltages SD card is not yet |
| 311 | * specified. |
| 312 | */ |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 313 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 314 | (mmc->cfg->voltages & 0xff8000); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 315 | |
| 316 | if (mmc->version == SD_VERSION_2) |
| 317 | cmd.cmdarg |= OCR_HCS; |
| 318 | |
| 319 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 320 | |
| 321 | if (err) |
| 322 | return err; |
| 323 | |
| 324 | udelay(1000); |
| 325 | } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); |
| 326 | |
| 327 | if (timeout <= 0) |
| 328 | return UNUSABLE_ERR; |
| 329 | |
| 330 | if (mmc->version != SD_VERSION_2) |
| 331 | mmc->version = SD_VERSION_1_0; |
| 332 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 333 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
| 334 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; |
| 335 | cmd.resp_type = MMC_RSP_R3; |
| 336 | cmd.cmdarg = 0; |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 337 | |
| 338 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 339 | |
| 340 | if (err) |
| 341 | return err; |
| 342 | } |
| 343 | |
Rabin Vincent | 998be3d | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 344 | mmc->ocr = cmd.response[0]; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 345 | |
| 346 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); |
| 347 | mmc->rca = 0; |
| 348 | |
| 349 | return 0; |
| 350 | } |
| 351 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 352 | /* We pass in the cmd since otherwise the init seems to fail */ |
| 353 | static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd, |
| 354 | int use_arg) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 355 | { |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 356 | int err; |
| 357 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 358 | cmd->cmdidx = MMC_CMD_SEND_OP_COND; |
| 359 | cmd->resp_type = MMC_RSP_R3; |
| 360 | cmd->cmdarg = 0; |
| 361 | if (use_arg && !mmc_host_is_spi(mmc)) { |
| 362 | cmd->cmdarg = |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 363 | (mmc->cfg->voltages & |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 364 | (mmc->op_cond_response & OCR_VOLTAGE_MASK)) | |
| 365 | (mmc->op_cond_response & OCR_ACCESS_MODE); |
| 366 | |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 367 | if (mmc->cfg->host_caps & MMC_MODE_HC) |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 368 | cmd->cmdarg |= OCR_HCS; |
| 369 | } |
| 370 | err = mmc_send_cmd(mmc, cmd, NULL); |
| 371 | if (err) |
| 372 | return err; |
| 373 | mmc->op_cond_response = cmd->response[0]; |
| 374 | return 0; |
| 375 | } |
| 376 | |
| 377 | int mmc_send_op_cond(struct mmc *mmc) |
| 378 | { |
| 379 | struct mmc_cmd cmd; |
| 380 | int err, i; |
| 381 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 382 | /* Some cards seem to need this */ |
| 383 | mmc_go_idle(mmc); |
| 384 | |
Raffaele Recalcati | 31cacba | 2011-03-11 02:01:13 +0000 | [diff] [blame] | 385 | /* Asking to the card its capabilities */ |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 386 | mmc->op_cond_pending = 1; |
| 387 | for (i = 0; i < 2; i++) { |
| 388 | err = mmc_send_op_cond_iter(mmc, &cmd, i != 0); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 389 | if (err) |
| 390 | return err; |
| 391 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 392 | /* exit if not busy (flag seems to be inverted) */ |
| 393 | if (mmc->op_cond_response & OCR_BUSY) |
| 394 | return 0; |
| 395 | } |
| 396 | return IN_PROGRESS; |
| 397 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 398 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 399 | int mmc_complete_op_cond(struct mmc *mmc) |
| 400 | { |
| 401 | struct mmc_cmd cmd; |
| 402 | int timeout = 1000; |
| 403 | uint start; |
| 404 | int err; |
| 405 | |
| 406 | mmc->op_cond_pending = 0; |
| 407 | start = get_timer(0); |
| 408 | do { |
| 409 | err = mmc_send_op_cond_iter(mmc, &cmd, 1); |
| 410 | if (err) |
| 411 | return err; |
| 412 | if (get_timer(start) > timeout) |
| 413 | return UNUSABLE_ERR; |
| 414 | udelay(100); |
| 415 | } while (!(mmc->op_cond_response & OCR_BUSY)); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 416 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 417 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
| 418 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; |
| 419 | cmd.resp_type = MMC_RSP_R3; |
| 420 | cmd.cmdarg = 0; |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 421 | |
| 422 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 423 | |
| 424 | if (err) |
| 425 | return err; |
| 426 | } |
| 427 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 428 | mmc->version = MMC_VERSION_UNKNOWN; |
Rabin Vincent | 998be3d | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 429 | mmc->ocr = cmd.response[0]; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 430 | |
| 431 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); |
Stephen Warren | def816a | 2014-01-30 16:11:12 -0700 | [diff] [blame] | 432 | mmc->rca = 1; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 433 | |
| 434 | return 0; |
| 435 | } |
| 436 | |
| 437 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 438 | static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 439 | { |
| 440 | struct mmc_cmd cmd; |
| 441 | struct mmc_data data; |
| 442 | int err; |
| 443 | |
| 444 | /* Get the Card Status Register */ |
| 445 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; |
| 446 | cmd.resp_type = MMC_RSP_R1; |
| 447 | cmd.cmdarg = 0; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 448 | |
Yoshihiro Shimoda | cdfd1ac | 2012-06-07 19:09:11 +0000 | [diff] [blame] | 449 | data.dest = (char *)ext_csd; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 450 | data.blocks = 1; |
Simon Glass | 8bfa195 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 451 | data.blocksize = MMC_MAX_BLOCK_LEN; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 452 | data.flags = MMC_DATA_READ; |
| 453 | |
| 454 | err = mmc_send_cmd(mmc, &cmd, &data); |
| 455 | |
| 456 | return err; |
| 457 | } |
| 458 | |
| 459 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 460 | static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 461 | { |
| 462 | struct mmc_cmd cmd; |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 463 | int timeout = 1000; |
| 464 | int ret; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 465 | |
| 466 | cmd.cmdidx = MMC_CMD_SWITCH; |
| 467 | cmd.resp_type = MMC_RSP_R1b; |
| 468 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 469 | (index << 16) | |
| 470 | (value << 8); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 471 | |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 472 | ret = mmc_send_cmd(mmc, &cmd, NULL); |
| 473 | |
| 474 | /* Waiting for the ready status */ |
Jan Kloetzke | 93ad0d1 | 2012-02-05 22:29:11 +0000 | [diff] [blame] | 475 | if (!ret) |
| 476 | ret = mmc_send_status(mmc, timeout); |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 477 | |
| 478 | return ret; |
| 479 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 480 | } |
| 481 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 482 | static int mmc_change_freq(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 483 | { |
Simon Glass | 8bfa195 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 484 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 485 | char cardtype; |
| 486 | int err; |
| 487 | |
| 488 | mmc->card_caps = 0; |
| 489 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 490 | if (mmc_host_is_spi(mmc)) |
| 491 | return 0; |
| 492 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 493 | /* Only version 4 supports high-speed */ |
| 494 | if (mmc->version < MMC_VERSION_4) |
| 495 | return 0; |
| 496 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 497 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 498 | |
| 499 | if (err) |
| 500 | return err; |
| 501 | |
Lei Wen | 0560db1 | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 502 | cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 503 | |
| 504 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); |
| 505 | |
| 506 | if (err) |
| 507 | return err; |
| 508 | |
| 509 | /* Now check to see that it worked */ |
| 510 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 511 | |
| 512 | if (err) |
| 513 | return err; |
| 514 | |
| 515 | /* No high-speed support */ |
Lei Wen | 0560db1 | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 516 | if (!ext_csd[EXT_CSD_HS_TIMING]) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 517 | return 0; |
| 518 | |
| 519 | /* High Speed is set, there are two types: 52MHz and 26MHz */ |
Jaehoon Chung | d22e3d4 | 2014-05-16 13:59:54 +0900 | [diff] [blame^] | 520 | if (cardtype & EXT_CSD_CARD_TYPE_52) { |
| 521 | if (cardtype & EXT_CSD_CARD_TYPE_DDR_52) |
| 522 | mmc->card_caps |= MMC_MODE_DDR_52MHz; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 523 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; |
Jaehoon Chung | d22e3d4 | 2014-05-16 13:59:54 +0900 | [diff] [blame^] | 524 | } else { |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 525 | mmc->card_caps |= MMC_MODE_HS; |
Jaehoon Chung | d22e3d4 | 2014-05-16 13:59:54 +0900 | [diff] [blame^] | 526 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 527 | |
| 528 | return 0; |
| 529 | } |
| 530 | |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 531 | static int mmc_set_capacity(struct mmc *mmc, int part_num) |
| 532 | { |
| 533 | switch (part_num) { |
| 534 | case 0: |
| 535 | mmc->capacity = mmc->capacity_user; |
| 536 | break; |
| 537 | case 1: |
| 538 | case 2: |
| 539 | mmc->capacity = mmc->capacity_boot; |
| 540 | break; |
| 541 | case 3: |
| 542 | mmc->capacity = mmc->capacity_rpmb; |
| 543 | break; |
| 544 | case 4: |
| 545 | case 5: |
| 546 | case 6: |
| 547 | case 7: |
| 548 | mmc->capacity = mmc->capacity_gp[part_num - 4]; |
| 549 | break; |
| 550 | default: |
| 551 | return -1; |
| 552 | } |
| 553 | |
| 554 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
| 555 | |
| 556 | return 0; |
| 557 | } |
| 558 | |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 559 | int mmc_switch_part(int dev_num, unsigned int part_num) |
| 560 | { |
| 561 | struct mmc *mmc = find_mmc_device(dev_num); |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 562 | int ret; |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 563 | |
| 564 | if (!mmc) |
| 565 | return -1; |
| 566 | |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 567 | ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, |
| 568 | (mmc->part_config & ~PART_ACCESS_MASK) |
| 569 | | (part_num & PART_ACCESS_MASK)); |
| 570 | if (ret) |
| 571 | return ret; |
| 572 | |
| 573 | return mmc_set_capacity(mmc, part_num); |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 574 | } |
| 575 | |
Thierry Reding | 48972d9 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 576 | int mmc_getcd(struct mmc *mmc) |
| 577 | { |
| 578 | int cd; |
| 579 | |
| 580 | cd = board_mmc_getcd(mmc); |
| 581 | |
Peter Korsgaard | d4e1da4 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 582 | if (cd < 0) { |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 583 | if (mmc->cfg->ops->getcd) |
| 584 | cd = mmc->cfg->ops->getcd(mmc); |
Peter Korsgaard | d4e1da4 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 585 | else |
| 586 | cd = 1; |
| 587 | } |
Thierry Reding | 48972d9 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 588 | |
| 589 | return cd; |
| 590 | } |
| 591 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 592 | static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 593 | { |
| 594 | struct mmc_cmd cmd; |
| 595 | struct mmc_data data; |
| 596 | |
| 597 | /* Switch the frequency */ |
| 598 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; |
| 599 | cmd.resp_type = MMC_RSP_R1; |
| 600 | cmd.cmdarg = (mode << 31) | 0xffffff; |
| 601 | cmd.cmdarg &= ~(0xf << (group * 4)); |
| 602 | cmd.cmdarg |= value << (group * 4); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 603 | |
| 604 | data.dest = (char *)resp; |
| 605 | data.blocksize = 64; |
| 606 | data.blocks = 1; |
| 607 | data.flags = MMC_DATA_READ; |
| 608 | |
| 609 | return mmc_send_cmd(mmc, &cmd, &data); |
| 610 | } |
| 611 | |
| 612 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 613 | static int sd_change_freq(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 614 | { |
| 615 | int err; |
| 616 | struct mmc_cmd cmd; |
Anton staaf | f781dd3 | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 617 | ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); |
| 618 | ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 619 | struct mmc_data data; |
| 620 | int timeout; |
| 621 | |
| 622 | mmc->card_caps = 0; |
| 623 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 624 | if (mmc_host_is_spi(mmc)) |
| 625 | return 0; |
| 626 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 627 | /* Read the SCR to find out if this card supports higher speeds */ |
| 628 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 629 | cmd.resp_type = MMC_RSP_R1; |
| 630 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 631 | |
| 632 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 633 | |
| 634 | if (err) |
| 635 | return err; |
| 636 | |
| 637 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; |
| 638 | cmd.resp_type = MMC_RSP_R1; |
| 639 | cmd.cmdarg = 0; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 640 | |
| 641 | timeout = 3; |
| 642 | |
| 643 | retry_scr: |
Anton staaf | f781dd3 | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 644 | data.dest = (char *)scr; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 645 | data.blocksize = 8; |
| 646 | data.blocks = 1; |
| 647 | data.flags = MMC_DATA_READ; |
| 648 | |
| 649 | err = mmc_send_cmd(mmc, &cmd, &data); |
| 650 | |
| 651 | if (err) { |
| 652 | if (timeout--) |
| 653 | goto retry_scr; |
| 654 | |
| 655 | return err; |
| 656 | } |
| 657 | |
Yauhen Kharuzhy | 4e3d89b | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 658 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
| 659 | mmc->scr[1] = __be32_to_cpu(scr[1]); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 660 | |
| 661 | switch ((mmc->scr[0] >> 24) & 0xf) { |
| 662 | case 0: |
| 663 | mmc->version = SD_VERSION_1_0; |
| 664 | break; |
| 665 | case 1: |
| 666 | mmc->version = SD_VERSION_1_10; |
| 667 | break; |
| 668 | case 2: |
| 669 | mmc->version = SD_VERSION_2; |
Jaehoon Chung | 1741c64 | 2013-01-29 22:58:16 +0000 | [diff] [blame] | 670 | if ((mmc->scr[0] >> 15) & 0x1) |
| 671 | mmc->version = SD_VERSION_3; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 672 | break; |
| 673 | default: |
| 674 | mmc->version = SD_VERSION_1_0; |
| 675 | break; |
| 676 | } |
| 677 | |
Alagu Sankar | b44c708 | 2010-05-12 15:08:24 +0530 | [diff] [blame] | 678 | if (mmc->scr[0] & SD_DATA_4BIT) |
| 679 | mmc->card_caps |= MMC_MODE_4BIT; |
| 680 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 681 | /* Version 1.0 doesn't support switching */ |
| 682 | if (mmc->version == SD_VERSION_1_0) |
| 683 | return 0; |
| 684 | |
| 685 | timeout = 4; |
| 686 | while (timeout--) { |
| 687 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, |
Anton staaf | f781dd3 | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 688 | (u8 *)switch_status); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 689 | |
| 690 | if (err) |
| 691 | return err; |
| 692 | |
| 693 | /* The high-speed function is busy. Try again */ |
Yauhen Kharuzhy | 4e3d89b | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 694 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 695 | break; |
| 696 | } |
| 697 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 698 | /* If high-speed isn't supported, we return */ |
Yauhen Kharuzhy | 4e3d89b | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 699 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 700 | return 0; |
| 701 | |
Macpaul Lin | 2c3fbf4 | 2011-11-28 16:31:09 +0000 | [diff] [blame] | 702 | /* |
| 703 | * If the host doesn't support SD_HIGHSPEED, do not switch card to |
| 704 | * HIGHSPEED mode even if the card support SD_HIGHSPPED. |
| 705 | * This can avoid furthur problem when the card runs in different |
| 706 | * mode between the host. |
| 707 | */ |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 708 | if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && |
| 709 | (mmc->cfg->host_caps & MMC_MODE_HS))) |
Macpaul Lin | 2c3fbf4 | 2011-11-28 16:31:09 +0000 | [diff] [blame] | 710 | return 0; |
| 711 | |
Anton staaf | f781dd3 | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 712 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 713 | |
| 714 | if (err) |
| 715 | return err; |
| 716 | |
Yauhen Kharuzhy | 4e3d89b | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 717 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 718 | mmc->card_caps |= MMC_MODE_HS; |
| 719 | |
| 720 | return 0; |
| 721 | } |
| 722 | |
| 723 | /* frequency bases */ |
| 724 | /* divided by 10 to be nice to platforms without floating point */ |
Mike Frysinger | 5f837c2 | 2010-10-20 01:15:53 +0000 | [diff] [blame] | 725 | static const int fbase[] = { |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 726 | 10000, |
| 727 | 100000, |
| 728 | 1000000, |
| 729 | 10000000, |
| 730 | }; |
| 731 | |
| 732 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice |
| 733 | * to platforms without floating point. |
| 734 | */ |
Mike Frysinger | 5f837c2 | 2010-10-20 01:15:53 +0000 | [diff] [blame] | 735 | static const int multipliers[] = { |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 736 | 0, /* reserved */ |
| 737 | 10, |
| 738 | 12, |
| 739 | 13, |
| 740 | 15, |
| 741 | 20, |
| 742 | 25, |
| 743 | 30, |
| 744 | 35, |
| 745 | 40, |
| 746 | 45, |
| 747 | 50, |
| 748 | 55, |
| 749 | 60, |
| 750 | 70, |
| 751 | 80, |
| 752 | }; |
| 753 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 754 | static void mmc_set_ios(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 755 | { |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 756 | if (mmc->cfg->ops->set_ios) |
| 757 | mmc->cfg->ops->set_ios(mmc); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 758 | } |
| 759 | |
| 760 | void mmc_set_clock(struct mmc *mmc, uint clock) |
| 761 | { |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 762 | if (clock > mmc->cfg->f_max) |
| 763 | clock = mmc->cfg->f_max; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 764 | |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 765 | if (clock < mmc->cfg->f_min) |
| 766 | clock = mmc->cfg->f_min; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 767 | |
| 768 | mmc->clock = clock; |
| 769 | |
| 770 | mmc_set_ios(mmc); |
| 771 | } |
| 772 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 773 | static void mmc_set_bus_width(struct mmc *mmc, uint width) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 774 | { |
| 775 | mmc->bus_width = width; |
| 776 | |
| 777 | mmc_set_ios(mmc); |
| 778 | } |
| 779 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 780 | static int mmc_startup(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 781 | { |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 782 | int err, i; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 783 | uint mult, freq; |
Yoshihiro Shimoda | 639b782 | 2011-07-04 22:13:26 +0000 | [diff] [blame] | 784 | u64 cmult, csize, capacity; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 785 | struct mmc_cmd cmd; |
Simon Glass | 8bfa195 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 786 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
| 787 | ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 788 | int timeout = 1000; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 789 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 790 | #ifdef CONFIG_MMC_SPI_CRC_ON |
| 791 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ |
| 792 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; |
| 793 | cmd.resp_type = MMC_RSP_R1; |
| 794 | cmd.cmdarg = 1; |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 795 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 796 | |
| 797 | if (err) |
| 798 | return err; |
| 799 | } |
| 800 | #endif |
| 801 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 802 | /* Put the Card in Identify Mode */ |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 803 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
| 804 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 805 | cmd.resp_type = MMC_RSP_R2; |
| 806 | cmd.cmdarg = 0; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 807 | |
| 808 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 809 | |
| 810 | if (err) |
| 811 | return err; |
| 812 | |
| 813 | memcpy(mmc->cid, cmd.response, 16); |
| 814 | |
| 815 | /* |
| 816 | * For MMC cards, set the Relative Address. |
| 817 | * For SD cards, get the Relatvie Address. |
| 818 | * This also puts the cards into Standby State |
| 819 | */ |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 820 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
| 821 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; |
| 822 | cmd.cmdarg = mmc->rca << 16; |
| 823 | cmd.resp_type = MMC_RSP_R6; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 824 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 825 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 826 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 827 | if (err) |
| 828 | return err; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 829 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 830 | if (IS_SD(mmc)) |
| 831 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; |
| 832 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 833 | |
| 834 | /* Get the Card-Specific Data */ |
| 835 | cmd.cmdidx = MMC_CMD_SEND_CSD; |
| 836 | cmd.resp_type = MMC_RSP_R2; |
| 837 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 838 | |
| 839 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 840 | |
Raffaele Recalcati | 5d4fc8d | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 841 | /* Waiting for the ready status */ |
| 842 | mmc_send_status(mmc, timeout); |
| 843 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 844 | if (err) |
| 845 | return err; |
| 846 | |
Rabin Vincent | 998be3d | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 847 | mmc->csd[0] = cmd.response[0]; |
| 848 | mmc->csd[1] = cmd.response[1]; |
| 849 | mmc->csd[2] = cmd.response[2]; |
| 850 | mmc->csd[3] = cmd.response[3]; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 851 | |
| 852 | if (mmc->version == MMC_VERSION_UNKNOWN) { |
Rabin Vincent | 0b453ff | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 853 | int version = (cmd.response[0] >> 26) & 0xf; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 854 | |
| 855 | switch (version) { |
| 856 | case 0: |
| 857 | mmc->version = MMC_VERSION_1_2; |
| 858 | break; |
| 859 | case 1: |
| 860 | mmc->version = MMC_VERSION_1_4; |
| 861 | break; |
| 862 | case 2: |
| 863 | mmc->version = MMC_VERSION_2_2; |
| 864 | break; |
| 865 | case 3: |
| 866 | mmc->version = MMC_VERSION_3; |
| 867 | break; |
| 868 | case 4: |
| 869 | mmc->version = MMC_VERSION_4; |
| 870 | break; |
| 871 | default: |
| 872 | mmc->version = MMC_VERSION_1_2; |
| 873 | break; |
| 874 | } |
| 875 | } |
| 876 | |
| 877 | /* divide frequency by 10, since the mults are 10x bigger */ |
Rabin Vincent | 0b453ff | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 878 | freq = fbase[(cmd.response[0] & 0x7)]; |
| 879 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 880 | |
| 881 | mmc->tran_speed = freq * mult; |
| 882 | |
Markus Niebel | ab71188 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 883 | mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); |
Rabin Vincent | 998be3d | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 884 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 885 | |
| 886 | if (IS_SD(mmc)) |
| 887 | mmc->write_bl_len = mmc->read_bl_len; |
| 888 | else |
Rabin Vincent | 998be3d | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 889 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 890 | |
| 891 | if (mmc->high_capacity) { |
| 892 | csize = (mmc->csd[1] & 0x3f) << 16 |
| 893 | | (mmc->csd[2] & 0xffff0000) >> 16; |
| 894 | cmult = 8; |
| 895 | } else { |
| 896 | csize = (mmc->csd[1] & 0x3ff) << 2 |
| 897 | | (mmc->csd[2] & 0xc0000000) >> 30; |
| 898 | cmult = (mmc->csd[2] & 0x00038000) >> 15; |
| 899 | } |
| 900 | |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 901 | mmc->capacity_user = (csize + 1) << (cmult + 2); |
| 902 | mmc->capacity_user *= mmc->read_bl_len; |
| 903 | mmc->capacity_boot = 0; |
| 904 | mmc->capacity_rpmb = 0; |
| 905 | for (i = 0; i < 4; i++) |
| 906 | mmc->capacity_gp[i] = 0; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 907 | |
Simon Glass | 8bfa195 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 908 | if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) |
| 909 | mmc->read_bl_len = MMC_MAX_BLOCK_LEN; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 910 | |
Simon Glass | 8bfa195 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 911 | if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) |
| 912 | mmc->write_bl_len = MMC_MAX_BLOCK_LEN; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 913 | |
Markus Niebel | ab71188 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 914 | if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { |
| 915 | cmd.cmdidx = MMC_CMD_SET_DSR; |
| 916 | cmd.cmdarg = (mmc->dsr & 0xffff) << 16; |
| 917 | cmd.resp_type = MMC_RSP_NONE; |
| 918 | if (mmc_send_cmd(mmc, &cmd, NULL)) |
| 919 | printf("MMC: SET_DSR failed\n"); |
| 920 | } |
| 921 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 922 | /* Select the card, and put it into Transfer Mode */ |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 923 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
| 924 | cmd.cmdidx = MMC_CMD_SELECT_CARD; |
Ajay Bhargav | fe8f706 | 2011-10-05 03:13:23 +0000 | [diff] [blame] | 925 | cmd.resp_type = MMC_RSP_R1; |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 926 | cmd.cmdarg = mmc->rca << 16; |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 927 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 928 | |
Thomas Chou | d52ebf1 | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 929 | if (err) |
| 930 | return err; |
| 931 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 932 | |
Lei Wen | e6f99a5 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 933 | /* |
| 934 | * For SD, its erase group is always one sector |
| 935 | */ |
| 936 | mmc->erase_grp_size = 1; |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 937 | mmc->part_config = MMCPART_NOAVAILABLE; |
Sukumar Ghorai | d23e2c0 | 2010-09-20 18:29:29 +0530 | [diff] [blame] | 938 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
| 939 | /* check ext_csd version and capacity */ |
| 940 | err = mmc_send_ext_csd(mmc, ext_csd); |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 941 | if (!err && (ext_csd[EXT_CSD_REV] >= 2)) { |
Yoshihiro Shimoda | 639b782 | 2011-07-04 22:13:26 +0000 | [diff] [blame] | 942 | /* |
| 943 | * According to the JEDEC Standard, the value of |
| 944 | * ext_csd's capacity is valid if the value is more |
| 945 | * than 2GB |
| 946 | */ |
Lei Wen | 0560db1 | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 947 | capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 |
| 948 | | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
| 949 | | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
| 950 | | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; |
Simon Glass | 8bfa195 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 951 | capacity *= MMC_MAX_BLOCK_LEN; |
Łukasz Majewski | b1f1e821 | 2011-07-05 02:19:44 +0000 | [diff] [blame] | 952 | if ((capacity >> 20) > 2 * 1024) |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 953 | mmc->capacity_user = capacity; |
Sukumar Ghorai | d23e2c0 | 2010-09-20 18:29:29 +0530 | [diff] [blame] | 954 | } |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 955 | |
Jaehoon Chung | 64f4a61 | 2013-01-29 19:31:16 +0000 | [diff] [blame] | 956 | switch (ext_csd[EXT_CSD_REV]) { |
| 957 | case 1: |
| 958 | mmc->version = MMC_VERSION_4_1; |
| 959 | break; |
| 960 | case 2: |
| 961 | mmc->version = MMC_VERSION_4_2; |
| 962 | break; |
| 963 | case 3: |
| 964 | mmc->version = MMC_VERSION_4_3; |
| 965 | break; |
| 966 | case 5: |
| 967 | mmc->version = MMC_VERSION_4_41; |
| 968 | break; |
| 969 | case 6: |
| 970 | mmc->version = MMC_VERSION_4_5; |
| 971 | break; |
| 972 | } |
| 973 | |
Lei Wen | e6f99a5 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 974 | /* |
Oliver Metz | 1937e5a | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 975 | * Host needs to enable ERASE_GRP_DEF bit if device is |
| 976 | * partitioned. This bit will be lost every time after a reset |
| 977 | * or power off. This will affect erase size. |
Lei Wen | e6f99a5 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 978 | */ |
Oliver Metz | 1937e5a | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 979 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && |
| 980 | (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) { |
| 981 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 982 | EXT_CSD_ERASE_GROUP_DEF, 1); |
| 983 | |
| 984 | if (err) |
| 985 | return err; |
| 986 | |
| 987 | /* Read out group size from ext_csd */ |
Lei Wen | 0560db1 | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 988 | mmc->erase_grp_size = |
Simon Glass | 8bfa195 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 989 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * |
| 990 | MMC_MAX_BLOCK_LEN * 1024; |
| 991 | } else { |
Oliver Metz | 1937e5a | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 992 | /* Calculate the group size from the csd value. */ |
Lei Wen | e6f99a5 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 993 | int erase_gsz, erase_gmul; |
| 994 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; |
| 995 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; |
| 996 | mmc->erase_grp_size = (erase_gsz + 1) |
| 997 | * (erase_gmul + 1); |
| 998 | } |
| 999 | |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1000 | /* store the partition info of emmc */ |
Stephen Warren | 8948ea8 | 2012-07-30 10:55:43 +0000 | [diff] [blame] | 1001 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || |
| 1002 | ext_csd[EXT_CSD_BOOT_MULT]) |
Lei Wen | 0560db1 | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 1003 | mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1004 | |
| 1005 | mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; |
| 1006 | |
| 1007 | mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; |
| 1008 | |
| 1009 | for (i = 0; i < 4; i++) { |
| 1010 | int idx = EXT_CSD_GP_SIZE_MULT + i * 3; |
| 1011 | mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) + |
| 1012 | (ext_csd[idx + 1] << 8) + ext_csd[idx]; |
| 1013 | mmc->capacity_gp[i] *= |
| 1014 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; |
| 1015 | mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; |
| 1016 | } |
Sukumar Ghorai | d23e2c0 | 2010-09-20 18:29:29 +0530 | [diff] [blame] | 1017 | } |
| 1018 | |
Stephen Warren | f866a46 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1019 | err = mmc_set_capacity(mmc, mmc->part_num); |
| 1020 | if (err) |
| 1021 | return err; |
| 1022 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1023 | if (IS_SD(mmc)) |
| 1024 | err = sd_change_freq(mmc); |
| 1025 | else |
| 1026 | err = mmc_change_freq(mmc); |
| 1027 | |
| 1028 | if (err) |
| 1029 | return err; |
| 1030 | |
| 1031 | /* Restrict card's capabilities by what the host can do */ |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1032 | mmc->card_caps &= mmc->cfg->host_caps; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1033 | |
| 1034 | if (IS_SD(mmc)) { |
| 1035 | if (mmc->card_caps & MMC_MODE_4BIT) { |
| 1036 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 1037 | cmd.resp_type = MMC_RSP_R1; |
| 1038 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1039 | |
| 1040 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1041 | if (err) |
| 1042 | return err; |
| 1043 | |
| 1044 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; |
| 1045 | cmd.resp_type = MMC_RSP_R1; |
| 1046 | cmd.cmdarg = 2; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1047 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1048 | if (err) |
| 1049 | return err; |
| 1050 | |
| 1051 | mmc_set_bus_width(mmc, 4); |
| 1052 | } |
| 1053 | |
| 1054 | if (mmc->card_caps & MMC_MODE_HS) |
Jaehoon Chung | ad5fd92 | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1055 | mmc->tran_speed = 50000000; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1056 | else |
Jaehoon Chung | ad5fd92 | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1057 | mmc->tran_speed = 25000000; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1058 | } else { |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1059 | int idx; |
| 1060 | |
| 1061 | /* An array of possible bus widths in order of preference */ |
| 1062 | static unsigned ext_csd_bits[] = { |
Jaehoon Chung | d22e3d4 | 2014-05-16 13:59:54 +0900 | [diff] [blame^] | 1063 | EXT_CSD_DDR_BUS_WIDTH_8, |
| 1064 | EXT_CSD_DDR_BUS_WIDTH_4, |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1065 | EXT_CSD_BUS_WIDTH_8, |
| 1066 | EXT_CSD_BUS_WIDTH_4, |
| 1067 | EXT_CSD_BUS_WIDTH_1, |
| 1068 | }; |
| 1069 | |
| 1070 | /* An array to map CSD bus widths to host cap bits */ |
| 1071 | static unsigned ext_to_hostcaps[] = { |
Jaehoon Chung | d22e3d4 | 2014-05-16 13:59:54 +0900 | [diff] [blame^] | 1072 | [EXT_CSD_DDR_BUS_WIDTH_4] = MMC_MODE_DDR_52MHz, |
| 1073 | [EXT_CSD_DDR_BUS_WIDTH_8] = MMC_MODE_DDR_52MHz, |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1074 | [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, |
| 1075 | [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, |
| 1076 | }; |
| 1077 | |
| 1078 | /* An array to map chosen bus width to an integer */ |
| 1079 | static unsigned widths[] = { |
Jaehoon Chung | d22e3d4 | 2014-05-16 13:59:54 +0900 | [diff] [blame^] | 1080 | 8, 4, 8, 4, 1, |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1081 | }; |
| 1082 | |
| 1083 | for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { |
| 1084 | unsigned int extw = ext_csd_bits[idx]; |
| 1085 | |
| 1086 | /* |
| 1087 | * Check to make sure the controller supports |
| 1088 | * this bus width, if it's more than 1 |
| 1089 | */ |
| 1090 | if (extw != EXT_CSD_BUS_WIDTH_1 && |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1091 | !(mmc->cfg->host_caps & ext_to_hostcaps[extw])) |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1092 | continue; |
| 1093 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1094 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1095 | EXT_CSD_BUS_WIDTH, extw); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1096 | |
| 1097 | if (err) |
Lei Wen | 4137894 | 2011-10-03 20:35:11 +0000 | [diff] [blame] | 1098 | continue; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1099 | |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1100 | mmc_set_bus_width(mmc, widths[idx]); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1101 | |
Lei Wen | 4137894 | 2011-10-03 20:35:11 +0000 | [diff] [blame] | 1102 | err = mmc_send_ext_csd(mmc, test_csd); |
| 1103 | if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \ |
| 1104 | == test_csd[EXT_CSD_PARTITIONING_SUPPORT] |
| 1105 | && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \ |
| 1106 | == test_csd[EXT_CSD_ERASE_GROUP_DEF] \ |
| 1107 | && ext_csd[EXT_CSD_REV] \ |
| 1108 | == test_csd[EXT_CSD_REV] |
| 1109 | && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \ |
| 1110 | == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] |
| 1111 | && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \ |
| 1112 | &test_csd[EXT_CSD_SEC_CNT], 4) == 0) { |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1113 | |
Andy Fleming | 7798f6d | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1114 | mmc->card_caps |= ext_to_hostcaps[extw]; |
Lei Wen | 4137894 | 2011-10-03 20:35:11 +0000 | [diff] [blame] | 1115 | break; |
| 1116 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1117 | } |
| 1118 | |
| 1119 | if (mmc->card_caps & MMC_MODE_HS) { |
| 1120 | if (mmc->card_caps & MMC_MODE_HS_52MHz) |
Jaehoon Chung | ad5fd92 | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1121 | mmc->tran_speed = 52000000; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1122 | else |
Jaehoon Chung | ad5fd92 | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1123 | mmc->tran_speed = 26000000; |
| 1124 | } |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1125 | } |
| 1126 | |
Jaehoon Chung | ad5fd92 | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1127 | mmc_set_clock(mmc, mmc->tran_speed); |
| 1128 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1129 | /* fill in device description */ |
| 1130 | mmc->block_dev.lun = 0; |
| 1131 | mmc->block_dev.type = 0; |
| 1132 | mmc->block_dev.blksz = mmc->read_bl_len; |
Egbert Eich | 0472fbf | 2013-04-09 21:11:56 +0000 | [diff] [blame] | 1133 | mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz); |
Rabin Vincent | 9b1f942 | 2009-04-05 13:30:54 +0530 | [diff] [blame] | 1134 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1135 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Taylor Hutt | babce5f | 2012-10-20 17:15:59 +0000 | [diff] [blame] | 1136 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x", |
| 1137 | mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), |
| 1138 | (mmc->cid[3] >> 16) & 0xffff); |
| 1139 | sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, |
| 1140 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, |
| 1141 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, |
| 1142 | (mmc->cid[2] >> 24) & 0xff); |
| 1143 | sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, |
| 1144 | (mmc->cid[2] >> 16) & 0xf); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1145 | #else |
| 1146 | mmc->block_dev.vendor[0] = 0; |
| 1147 | mmc->block_dev.product[0] = 0; |
| 1148 | mmc->block_dev.revision[0] = 0; |
| 1149 | #endif |
Mikhail Kshevetskiy | 122efd4 | 2012-07-09 08:53:38 +0000 | [diff] [blame] | 1150 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1151 | init_part(&mmc->block_dev); |
Mikhail Kshevetskiy | 122efd4 | 2012-07-09 08:53:38 +0000 | [diff] [blame] | 1152 | #endif |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1153 | |
| 1154 | return 0; |
| 1155 | } |
| 1156 | |
Kim Phillips | fdbb873 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 1157 | static int mmc_send_if_cond(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1158 | { |
| 1159 | struct mmc_cmd cmd; |
| 1160 | int err; |
| 1161 | |
| 1162 | cmd.cmdidx = SD_CMD_SEND_IF_COND; |
| 1163 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1164 | cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1165 | cmd.resp_type = MMC_RSP_R7; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1166 | |
| 1167 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1168 | |
| 1169 | if (err) |
| 1170 | return err; |
| 1171 | |
Rabin Vincent | 998be3d | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 1172 | if ((cmd.response[0] & 0xff) != 0xaa) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1173 | return UNUSABLE_ERR; |
| 1174 | else |
| 1175 | mmc->version = SD_VERSION_2; |
| 1176 | |
| 1177 | return 0; |
| 1178 | } |
| 1179 | |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1180 | /* not used any more */ |
| 1181 | int __deprecated mmc_register(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1182 | { |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1183 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
| 1184 | printf("%s is deprecated! use mmc_create() instead.\n", __func__); |
| 1185 | #endif |
| 1186 | return -1; |
| 1187 | } |
| 1188 | |
| 1189 | struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) |
| 1190 | { |
| 1191 | struct mmc *mmc; |
| 1192 | |
| 1193 | /* quick validation */ |
| 1194 | if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL || |
| 1195 | cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0) |
| 1196 | return NULL; |
| 1197 | |
| 1198 | mmc = calloc(1, sizeof(*mmc)); |
| 1199 | if (mmc == NULL) |
| 1200 | return NULL; |
| 1201 | |
| 1202 | mmc->cfg = cfg; |
| 1203 | mmc->priv = priv; |
| 1204 | |
| 1205 | /* the following chunk was mmc_register() */ |
| 1206 | |
Markus Niebel | ab71188 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 1207 | /* Setup dsr related values */ |
| 1208 | mmc->dsr_imp = 0; |
| 1209 | mmc->dsr = 0xffffffff; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1210 | /* Setup the universal parts of the block interface just once */ |
| 1211 | mmc->block_dev.if_type = IF_TYPE_MMC; |
| 1212 | mmc->block_dev.dev = cur_dev_num++; |
| 1213 | mmc->block_dev.removable = 1; |
| 1214 | mmc->block_dev.block_read = mmc_bread; |
| 1215 | mmc->block_dev.block_write = mmc_bwrite; |
Lei Wen | e6f99a5 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 1216 | mmc->block_dev.block_erase = mmc_berase; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1217 | |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1218 | /* setup initial part type */ |
| 1219 | mmc->block_dev.part_type = mmc->cfg->part_type; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1220 | |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1221 | INIT_LIST_HEAD(&mmc->link); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1222 | |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1223 | list_add_tail(&mmc->link, &mmc_devices); |
| 1224 | |
| 1225 | return mmc; |
| 1226 | } |
| 1227 | |
| 1228 | void mmc_destroy(struct mmc *mmc) |
| 1229 | { |
| 1230 | /* only freeing memory for now */ |
| 1231 | free(mmc); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1232 | } |
| 1233 | |
Matthew McClintock | df3fc52 | 2011-05-24 05:31:19 +0000 | [diff] [blame] | 1234 | #ifdef CONFIG_PARTITIONS |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1235 | block_dev_desc_t *mmc_get_dev(int dev) |
| 1236 | { |
| 1237 | struct mmc *mmc = find_mmc_device(dev); |
Benoît Thébaudeau | 6bb4b4b | 2012-08-10 08:59:12 +0000 | [diff] [blame] | 1238 | if (!mmc || mmc_init(mmc)) |
Łukasz Majewski | 40242bc | 2012-04-19 02:39:18 +0000 | [diff] [blame] | 1239 | return NULL; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1240 | |
Łukasz Majewski | 40242bc | 2012-04-19 02:39:18 +0000 | [diff] [blame] | 1241 | return &mmc->block_dev; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1242 | } |
Matthew McClintock | df3fc52 | 2011-05-24 05:31:19 +0000 | [diff] [blame] | 1243 | #endif |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1244 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1245 | int mmc_start_init(struct mmc *mmc) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1246 | { |
Macpaul Lin | afd5932 | 2011-11-14 23:35:39 +0000 | [diff] [blame] | 1247 | int err; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1248 | |
Pantelis Antoniou | ab769f2 | 2014-02-26 19:28:45 +0200 | [diff] [blame] | 1249 | /* we pretend there's no card when init is NULL */ |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1250 | if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) { |
Thierry Reding | 48972d9 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1251 | mmc->has_init = 0; |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1252 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Thierry Reding | 48972d9 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1253 | printf("MMC: no card present\n"); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1254 | #endif |
Thierry Reding | 48972d9 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1255 | return NO_CARD_ERR; |
| 1256 | } |
| 1257 | |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1258 | if (mmc->has_init) |
| 1259 | return 0; |
| 1260 | |
Pantelis Antoniou | ab769f2 | 2014-02-26 19:28:45 +0200 | [diff] [blame] | 1261 | /* made sure it's not NULL earlier */ |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1262 | err = mmc->cfg->ops->init(mmc); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1263 | |
| 1264 | if (err) |
| 1265 | return err; |
| 1266 | |
Ilya Yanok | b86b85e | 2009-06-29 17:53:16 +0400 | [diff] [blame] | 1267 | mmc_set_bus_width(mmc, 1); |
| 1268 | mmc_set_clock(mmc, 1); |
| 1269 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1270 | /* Reset the Card */ |
| 1271 | err = mmc_go_idle(mmc); |
| 1272 | |
| 1273 | if (err) |
| 1274 | return err; |
| 1275 | |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1276 | /* The internal partition reset to user partition(0) at every CMD0*/ |
| 1277 | mmc->part_num = 0; |
| 1278 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1279 | /* Test for SD version 2 */ |
Macpaul Lin | afd5932 | 2011-11-14 23:35:39 +0000 | [diff] [blame] | 1280 | err = mmc_send_if_cond(mmc); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1281 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1282 | /* Now try to get the SD card's operating condition */ |
| 1283 | err = sd_send_op_cond(mmc); |
| 1284 | |
| 1285 | /* If the command timed out, we check for an MMC card */ |
| 1286 | if (err == TIMEOUT) { |
| 1287 | err = mmc_send_op_cond(mmc); |
| 1288 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1289 | if (err && err != IN_PROGRESS) { |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1290 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1291 | printf("Card did not respond to voltage select!\n"); |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1292 | #endif |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1293 | return UNUSABLE_ERR; |
| 1294 | } |
| 1295 | } |
| 1296 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1297 | if (err == IN_PROGRESS) |
| 1298 | mmc->init_in_progress = 1; |
| 1299 | |
| 1300 | return err; |
| 1301 | } |
| 1302 | |
| 1303 | static int mmc_complete_init(struct mmc *mmc) |
| 1304 | { |
| 1305 | int err = 0; |
| 1306 | |
| 1307 | if (mmc->op_cond_pending) |
| 1308 | err = mmc_complete_op_cond(mmc); |
| 1309 | |
| 1310 | if (!err) |
| 1311 | err = mmc_startup(mmc); |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1312 | if (err) |
| 1313 | mmc->has_init = 0; |
| 1314 | else |
| 1315 | mmc->has_init = 1; |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1316 | mmc->init_in_progress = 0; |
| 1317 | return err; |
| 1318 | } |
| 1319 | |
| 1320 | int mmc_init(struct mmc *mmc) |
| 1321 | { |
| 1322 | int err = IN_PROGRESS; |
| 1323 | unsigned start = get_timer(0); |
| 1324 | |
| 1325 | if (mmc->has_init) |
| 1326 | return 0; |
| 1327 | if (!mmc->init_in_progress) |
| 1328 | err = mmc_start_init(mmc); |
| 1329 | |
| 1330 | if (!err || err == IN_PROGRESS) |
| 1331 | err = mmc_complete_init(mmc); |
| 1332 | debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); |
Lei Wen | bc897b1 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1333 | return err; |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1334 | } |
| 1335 | |
Markus Niebel | ab71188 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 1336 | int mmc_set_dsr(struct mmc *mmc, u16 val) |
| 1337 | { |
| 1338 | mmc->dsr = val; |
| 1339 | return 0; |
| 1340 | } |
| 1341 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1342 | /* |
| 1343 | * CPU and board-specific MMC initializations. Aliased function |
| 1344 | * signals caller to move on |
| 1345 | */ |
| 1346 | static int __def_mmc_init(bd_t *bis) |
| 1347 | { |
| 1348 | return -1; |
| 1349 | } |
| 1350 | |
Peter Tyser | f9a109b | 2009-04-20 11:08:46 -0500 | [diff] [blame] | 1351 | int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
| 1352 | int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1353 | |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1354 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
| 1355 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1356 | void print_mmc_devices(char separator) |
| 1357 | { |
| 1358 | struct mmc *m; |
| 1359 | struct list_head *entry; |
| 1360 | |
| 1361 | list_for_each(entry, &mmc_devices) { |
| 1362 | m = list_entry(entry, struct mmc, link); |
| 1363 | |
Pantelis Antoniou | 93bfd61 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1364 | printf("%s: %d", m->cfg->name, m->block_dev.dev); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1365 | |
| 1366 | if (entry->next != &mmc_devices) |
| 1367 | printf("%c ", separator); |
| 1368 | } |
| 1369 | |
| 1370 | printf("\n"); |
| 1371 | } |
| 1372 | |
Paul Burton | 5619682 | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1373 | #else |
| 1374 | void print_mmc_devices(char separator) { } |
| 1375 | #endif |
| 1376 | |
Lei Wen | ea6ebe2 | 2011-05-02 16:26:25 +0000 | [diff] [blame] | 1377 | int get_mmc_num(void) |
| 1378 | { |
| 1379 | return cur_dev_num; |
| 1380 | } |
| 1381 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1382 | void mmc_set_preinit(struct mmc *mmc, int preinit) |
| 1383 | { |
| 1384 | mmc->preinit = preinit; |
| 1385 | } |
| 1386 | |
| 1387 | static void do_preinit(void) |
| 1388 | { |
| 1389 | struct mmc *m; |
| 1390 | struct list_head *entry; |
| 1391 | |
| 1392 | list_for_each(entry, &mmc_devices) { |
| 1393 | m = list_entry(entry, struct mmc, link); |
| 1394 | |
| 1395 | if (m->preinit) |
| 1396 | mmc_start_init(m); |
| 1397 | } |
| 1398 | } |
| 1399 | |
| 1400 | |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1401 | int mmc_initialize(bd_t *bis) |
| 1402 | { |
| 1403 | INIT_LIST_HEAD (&mmc_devices); |
| 1404 | cur_dev_num = 0; |
| 1405 | |
| 1406 | if (board_mmc_init(bis) < 0) |
| 1407 | cpu_mmc_init(bis); |
| 1408 | |
Ying Zhang | bb0dc10 | 2013-08-16 15:16:11 +0800 | [diff] [blame] | 1409 | #ifndef CONFIG_SPL_BUILD |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1410 | print_mmc_devices(','); |
Ying Zhang | bb0dc10 | 2013-08-16 15:16:11 +0800 | [diff] [blame] | 1411 | #endif |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1412 | |
Che-Liang Chiou | e955044 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1413 | do_preinit(); |
Andy Fleming | 272cc70 | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1414 | return 0; |
| 1415 | } |
Amar | 3690d6d | 2013-04-27 11:42:58 +0530 | [diff] [blame] | 1416 | |
| 1417 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
| 1418 | /* |
| 1419 | * This function changes the size of boot partition and the size of rpmb |
| 1420 | * partition present on EMMC devices. |
| 1421 | * |
| 1422 | * Input Parameters: |
| 1423 | * struct *mmc: pointer for the mmc device strcuture |
| 1424 | * bootsize: size of boot partition |
| 1425 | * rpmbsize: size of rpmb partition |
| 1426 | * |
| 1427 | * Returns 0 on success. |
| 1428 | */ |
| 1429 | |
| 1430 | int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, |
| 1431 | unsigned long rpmbsize) |
| 1432 | { |
| 1433 | int err; |
| 1434 | struct mmc_cmd cmd; |
| 1435 | |
| 1436 | /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */ |
| 1437 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1438 | cmd.resp_type = MMC_RSP_R1b; |
| 1439 | cmd.cmdarg = MMC_CMD62_ARG1; |
| 1440 | |
| 1441 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1442 | if (err) { |
| 1443 | debug("mmc_boot_partition_size_change: Error1 = %d\n", err); |
| 1444 | return err; |
| 1445 | } |
| 1446 | |
| 1447 | /* Boot partition changing mode */ |
| 1448 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1449 | cmd.resp_type = MMC_RSP_R1b; |
| 1450 | cmd.cmdarg = MMC_CMD62_ARG2; |
| 1451 | |
| 1452 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1453 | if (err) { |
| 1454 | debug("mmc_boot_partition_size_change: Error2 = %d\n", err); |
| 1455 | return err; |
| 1456 | } |
| 1457 | /* boot partition size is multiple of 128KB */ |
| 1458 | bootsize = (bootsize * 1024) / 128; |
| 1459 | |
| 1460 | /* Arg: boot partition size */ |
| 1461 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1462 | cmd.resp_type = MMC_RSP_R1b; |
| 1463 | cmd.cmdarg = bootsize; |
| 1464 | |
| 1465 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1466 | if (err) { |
| 1467 | debug("mmc_boot_partition_size_change: Error3 = %d\n", err); |
| 1468 | return err; |
| 1469 | } |
| 1470 | /* RPMB partition size is multiple of 128KB */ |
| 1471 | rpmbsize = (rpmbsize * 1024) / 128; |
| 1472 | /* Arg: RPMB partition size */ |
| 1473 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1474 | cmd.resp_type = MMC_RSP_R1b; |
| 1475 | cmd.cmdarg = rpmbsize; |
| 1476 | |
| 1477 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1478 | if (err) { |
| 1479 | debug("mmc_boot_partition_size_change: Error4 = %d\n", err); |
| 1480 | return err; |
| 1481 | } |
| 1482 | return 0; |
| 1483 | } |
| 1484 | |
| 1485 | /* |
Tom Rini | 5a99b9d | 2014-02-05 10:24:22 -0500 | [diff] [blame] | 1486 | * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH |
| 1487 | * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH |
| 1488 | * and BOOT_MODE. |
| 1489 | * |
| 1490 | * Returns 0 on success. |
| 1491 | */ |
| 1492 | int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) |
| 1493 | { |
| 1494 | int err; |
| 1495 | |
| 1496 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, |
| 1497 | EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | |
| 1498 | EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | |
| 1499 | EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); |
| 1500 | |
| 1501 | if (err) |
| 1502 | return err; |
| 1503 | return 0; |
| 1504 | } |
| 1505 | |
| 1506 | /* |
Tom Rini | 792970b | 2014-02-05 10:24:21 -0500 | [diff] [blame] | 1507 | * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG) |
| 1508 | * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and |
| 1509 | * PARTITION_ACCESS. |
| 1510 | * |
| 1511 | * Returns 0 on success. |
| 1512 | */ |
| 1513 | int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access) |
| 1514 | { |
| 1515 | int err; |
| 1516 | |
| 1517 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, |
| 1518 | EXT_CSD_BOOT_ACK(ack) | |
| 1519 | EXT_CSD_BOOT_PART_NUM(part_num) | |
| 1520 | EXT_CSD_PARTITION_ACCESS(access)); |
| 1521 | |
| 1522 | if (err) |
| 1523 | return err; |
| 1524 | return 0; |
| 1525 | } |
Tom Rini | 33ace36 | 2014-02-07 14:15:20 -0500 | [diff] [blame] | 1526 | |
| 1527 | /* |
| 1528 | * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value |
| 1529 | * for enable. Note that this is a write-once field for non-zero values. |
| 1530 | * |
| 1531 | * Returns 0 on success. |
| 1532 | */ |
| 1533 | int mmc_set_rst_n_function(struct mmc *mmc, u8 enable) |
| 1534 | { |
| 1535 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION, |
| 1536 | enable); |
| 1537 | } |
Amar | 3690d6d | 2013-04-27 11:42:58 +0530 | [diff] [blame] | 1538 | #endif |