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Tom Warrenf01b6312012-12-11 13:34:18 +00001/*
2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Tom Warrenf01b6312012-12-11 13:34:18 +00006 */
7
Tom Warrenbfcf46d2013-02-26 12:18:48 +00008#ifndef _TEGRA_COMMON_H_
9#define _TEGRA_COMMON_H_
Alexey Brodkin1ace4022014-02-26 17:47:58 +040010#include <linux/sizes.h>
Tom Warrenf01b6312012-12-11 13:34:18 +000011#include <linux/stringify.h>
12
13/*
14 * High Level Configuration Options
15 */
Tom Warrenf01b6312012-12-11 13:34:18 +000016#define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
17
Tom Warrenf01b6312012-12-11 13:34:18 +000018#include <asm/arch/tegra.h> /* get chip and board defs */
19
Thierry Redingf41f0a12015-07-28 11:35:54 +020020/* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
21#ifndef CONFIG_ARM64
Rob Herring31df9892013-10-04 10:22:47 -050022#define CONFIG_SYS_TIMER_RATE 1000000
23#define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
Thierry Redingf41f0a12015-07-28 11:35:54 +020024#endif
Rob Herring31df9892013-10-04 10:22:47 -050025
Tom Warrenf01b6312012-12-11 13:34:18 +000026#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Tom Warrenf01b6312012-12-11 13:34:18 +000027
28/* Environment */
29#define CONFIG_ENV_VARS_UBOOT_CONFIG
30#define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
31
32/*
Tom Warrenbfcf46d2013-02-26 12:18:48 +000033 * NS16550 Configuration
Tom Warrenf01b6312012-12-11 13:34:18 +000034 */
Thomas Chou18746262015-11-19 21:48:11 +080035#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Tom Warrenf01b6312012-12-11 13:34:18 +000036
37/*
Stephen Warrenf1756032014-04-18 10:56:11 -060038 * Common HW configuration.
39 * If this varies between SoCs later, move to tegraNN-common.h
40 * Note: This is number of devices, not max device ID.
41 */
42#define CONFIG_SYS_MMC_MAX_DEVICE 4
43
44/*
Tom Warrenf01b6312012-12-11 13:34:18 +000045 * select serial console configuration
46 */
47#define CONFIG_CONS_INDEX 1
48
49/* allow to overwrite serial and ethaddr */
50#define CONFIG_ENV_OVERWRITE
Tom Warrenf01b6312012-12-11 13:34:18 +000051
Tom Warrenf01b6312012-12-11 13:34:18 +000052/* turn on command-line edit/hist/auto */
Alexey Brodkina1b343d2017-04-18 22:09:10 +030053#define CONFIG_CMDLINE_EDITING
Tom Warrenf01b6312012-12-11 13:34:18 +000054
Tom Warrenf01b6312012-12-11 13:34:18 +000055/*
Tom Warrenf01b6312012-12-11 13:34:18 +000056 * Increasing the size of the IO buffer as default nfsargs size is more
57 * than 256 and so it is not possible to edit it
58 */
Bryan Wu64a4fe72016-09-01 23:49:57 +000059#define CONFIG_SYS_CBSIZE (1024 * 2) /* Console I/O Buffer Size */
Tom Warrenf01b6312012-12-11 13:34:18 +000060/* Print Buffer Size */
Bryan Wu64a4fe72016-09-01 23:49:57 +000061#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
62
Tom Warrenf01b6312012-12-11 13:34:18 +000063/* Boot Argument Buffer Size */
64#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
65
66#define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
67#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
68
Tom Warrenf01b6312012-12-11 13:34:18 +000069/*-----------------------------------------------------------------------
70 * Physical Memory Map
71 */
Stephen Warrenbbc1b992015-08-07 16:12:45 -060072#define CONFIG_NR_DRAM_BANKS 2
Tom Warrenf01b6312012-12-11 13:34:18 +000073#define PHYS_SDRAM_1 NV_PA_SDRC_CS0
74#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
75
76#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
77#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
78
79#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
80
Stephen Warrenf0975322017-12-19 18:30:37 -070081#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000082#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
83#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
84#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
85 CONFIG_SYS_INIT_RAM_SIZE - \
86 GENERATED_GBL_DATA_SIZE)
Stephen Warrenf0975322017-12-19 18:30:37 -070087#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000088
Stephen Warren0d1bd152017-12-19 18:30:35 -070089#ifndef CONFIG_ARM64
Tom Warrenf01b6312012-12-11 13:34:18 +000090/* Defines for SPL */
Tom Warrenf01b6312012-12-11 13:34:18 +000091#define CONFIG_SPL_FRAMEWORK
Albert ARIBAUD6ebc3462013-04-12 05:14:30 +000092#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
Tom Warrenf01b6312012-12-11 13:34:18 +000093 CONFIG_SPL_TEXT_BASE)
94#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
Stephen Warren0d1bd152017-12-19 18:30:35 -070095#endif
Tom Warrenf01b6312012-12-11 13:34:18 +000096
Stephen Warrena885f852013-02-28 15:03:45 +000097/* Misc utility code */
98#define CONFIG_BOUNCE_BUFFER
Simon Glassdd7f65f2013-03-05 14:39:56 +000099
Stephen Warren68cf64d2014-02-05 09:24:57 -0700100#ifndef CONFIG_SPL_BUILD
101#include <config_distro_defaults.h>
102#endif
103
Tom Warrenf01b6312012-12-11 13:34:18 +0000104#endif /* _TEGRA_COMMON_H_ */