| Aubrey Li | 6545898 | 2007-03-20 18:16:24 +0800 | [diff] [blame] | 1 | /* |
| 2 | * cdefBF561.h |
| 3 | * |
| 4 | * (c) Copyright 2001-2004 Analog Devices, Inc. All rights reserved. |
| 5 | * |
| 6 | */ |
| 7 | |
| 8 | /* C POINTERS TO SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 */ |
| 9 | |
| 10 | #ifndef _CDEF_BF561_H |
| 11 | #define _CDEF_BF561_H |
| 12 | |
| 13 | /* |
| 14 | * #if !defined(__ADSPBF561__) |
| 15 | * #warning cdefBF561.h should only be included for BF561 chip. |
| 16 | * #endif |
| 17 | */ |
| 18 | |
| 19 | /* include all Core registers and bit definitions */ |
| 20 | #include <asm/arch-bf561/defBF561.h> |
| 21 | #include <asm/arch-common/cdef_LPBlackfin.h> |
| 22 | |
| 23 | /* |
| 24 | * System MMR Register Map |
| 25 | */ |
| 26 | |
| 27 | /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */ |
| 28 | #define pPLL_CTL (volatile unsigned short *)PLL_CTL |
| 29 | #define pPLL_DIV (volatile unsigned short *)PLL_DIV |
| 30 | #define pVR_CTL (volatile unsigned short *)VR_CTL |
| 31 | #define pPLL_STAT (volatile unsigned short *)PLL_STAT |
| 32 | #define pPLL_LOCKCNT (volatile unsigned short *)PLL_LOCKCNT |
| 33 | |
| 34 | /* |
| 35 | * System Reset and Interrupt Controller registers for |
| 36 | * core A (0xFFC0 0100-0xFFC0 01FF) |
| 37 | */ |
| 38 | #define pSICA_SWRST (volatile unsigned short *)SICA_SWRST |
| 39 | #define pSICA_SYSCR (volatile unsigned short *)SICA_SYSCR |
| 40 | #define pSICA_RVECT (volatile unsigned short *)SICA_RVECT |
| 41 | #define pSICA_IMASK (volatile unsigned long *)SICA_IMASK |
| 42 | #define pSICA_IMASK0 (volatile unsigned long *)SICA_IMASK0 |
| 43 | #define pSICA_IMASK1 (volatile unsigned long *)SICA_IMASK1 |
| 44 | #define pSICA_IAR0 (volatile unsigned long *)SICA_IAR0 |
| 45 | #define pSICA_IAR1 (volatile unsigned long *)SICA_IAR1 |
| 46 | #define pSICA_IAR2 (volatile unsigned long *)SICA_IAR2 |
| 47 | #define pSICA_IAR3 (volatile unsigned long *)SICA_IAR3 |
| 48 | #define pSICA_IAR4 (volatile unsigned long *)SICA_IAR4 |
| 49 | #define pSICA_IAR5 (volatile unsigned long *)SICA_IAR5 |
| 50 | #define pSICA_IAR6 (volatile unsigned long *)SICA_IAR6 |
| 51 | #define pSICA_IAR7 (volatile unsigned long *)SICA_IAR7 |
| 52 | #define pSICA_ISR0 (volatile unsigned long *)SICA_ISR0 |
| 53 | #define pSICA_ISR1 (volatile unsigned long *)SICA_ISR1 |
| 54 | #define pSICA_IWR0 (volatile unsigned long *)SICA_IWR0 |
| 55 | #define pSICA_IWR1 (volatile unsigned long *)SICA_IWR1 |
| 56 | |
| 57 | /* |
| 58 | * System Reset and Interrupt Controller registers for |
| 59 | * Core B (0xFFC0 1100-0xFFC0 11FF) |
| 60 | */ |
| 61 | #define pSICB_SWRST (volatile unsigned short *)SICB_SWRST |
| 62 | #define pSICB_SYSCR (volatile unsigned short *)SICB_SYSCR |
| 63 | #define pSICB_RVECT (volatile unsigned short *)SICB_RVECT |
| 64 | #define pSICB_IMASK0 (volatile unsigned long *)SICB_IMASK0 |
| 65 | #define pSICB_IMASK1 (volatile unsigned long *)SICB_IMASK1 |
| 66 | #define pSICB_IAR0 (volatile unsigned long *)SICB_IAR0 |
| 67 | #define pSICB_IAR1 (volatile unsigned long *)SICB_IAR1 |
| 68 | #define pSICB_IAR2 (volatile unsigned long *)SICB_IAR2 |
| 69 | #define pSICB_IAR3 (volatile unsigned long *)SICB_IAR3 |
| 70 | #define pSICB_IAR4 (volatile unsigned long *)SICB_IAR4 |
| 71 | #define pSICB_IAR5 (volatile unsigned long *)SICB_IAR5 |
| 72 | #define pSICB_IAR6 (volatile unsigned long *)SICB_IAR6 |
| 73 | #define pSICB_IAR7 (volatile unsigned long *)SICB_IAR7 |
| 74 | #define pSICB_ISR0 (volatile unsigned long *)SICB_ISR0 |
| 75 | #define pSICB_ISR1 (volatile unsigned long *)SICB_ISR1 |
| 76 | #define pSICB_IWR0 (volatile unsigned long *)SICB_IWR0 |
| 77 | #define pSICB_IWR1 (volatile unsigned long *)SICB_IWR1 |
| 78 | |
| 79 | /* Watchdog Timer registers for Core A (0xFFC0 0200-0xFFC0 02FF) */ |
| 80 | #define pWDOGA_CTL (volatile unsigned short *)WDOGA_CTL |
| 81 | #define pWDOGA_CNT (volatile unsigned long *)WDOGA_CNT |
| 82 | #define pWDOGA_STAT (volatile unsigned long *)WDOGA_STAT |
| 83 | |
| 84 | /* Watchdog Timer registers for Core B (0xFFC0 1200-0xFFC0 12FF) */ |
| 85 | #define pWDOGB_CTL (volatile unsigned short *)WDOGB_CTL |
| 86 | #define pWDOGB_CNT (volatile unsigned long *)WDOGB_CNT |
| 87 | #define pWDOGB_STAT (volatile unsigned long *)WDOGB_STAT |
| 88 | |
| 89 | /* UART Controller (0xFFC00400 - 0xFFC004FF) */ |
| 90 | #define pUART_THR (volatile unsigned short *)UART_THR |
| 91 | #define pUART_RBR (volatile unsigned short *)UART_RBR |
| 92 | #define pUART_DLL (volatile unsigned short *)UART_DLL |
| 93 | #define pUART_IER (volatile unsigned short *)UART_IER |
| 94 | #define pUART_DLH (volatile unsigned short *)UART_DLH |
| 95 | #define pUART_IIR (volatile unsigned short *)UART_IIR |
| 96 | #define pUART_LCR (volatile unsigned short *)UART_LCR |
| 97 | #define pUART_MCR (volatile unsigned short *)UART_MCR |
| 98 | #define pUART_LSR (volatile unsigned short *)UART_LSR |
| 99 | #define pUART_MSR (volatile unsigned short *)UART_MSR |
| 100 | #define pUART_SCR (volatile unsigned short *)UART_SCR |
| 101 | #define pUART_GCTL (volatile unsigned short *)UART_GCTL |
| 102 | |
| 103 | /* SPI Controller (0xFFC00500 - 0xFFC005FF) */ |
| 104 | #define pSPI_CTL (volatile unsigned short *)SPI_CTL |
| 105 | #define pSPI_FLG (volatile unsigned short *)SPI_FLG |
| 106 | #define pSPI_STAT (volatile unsigned short *)SPI_STAT |
| 107 | #define pSPI_TDBR (volatile unsigned short *)SPI_TDBR |
| 108 | #define pSPI_RDBR (volatile unsigned short *)SPI_RDBR |
| 109 | #define pSPI_BAUD (volatile unsigned short *)SPI_BAUD |
| 110 | #define pSPI_SHADOW (volatile unsigned short *)SPI_SHADOW |
| 111 | |
| 112 | /* Timer 0-7 registers (0xFFC0 0600-0xFFC0 06FF) */ |
| 113 | #define pTIMER0_CONFIG (volatile unsigned short *)TIMER0_CONFIG |
| 114 | #define pTIMER0_COUNTER (volatile unsigned long *)TIMER0_COUNTER |
| 115 | #define pTIMER0_PERIOD (volatile unsigned long *)TIMER0_PERIOD |
| 116 | #define pTIMER0_WIDTH (volatile unsigned long *)TIMER0_WIDTH |
| 117 | #define pTIMER1_CONFIG (volatile unsigned short *)TIMER1_CONFIG |
| 118 | #define pTIMER1_COUNTER (volatile unsigned long *)TIMER1_COUNTER |
| 119 | #define pTIMER1_PERIOD (volatile unsigned long *)TIMER1_PERIOD |
| 120 | #define pTIMER1_WIDTH (volatile unsigned long *)TIMER1_WIDTH |
| 121 | #define pTIMER2_CONFIG (volatile unsigned short *)TIMER2_CONFIG |
| 122 | #define pTIMER2_COUNTER (volatile unsigned long *)TIMER2_COUNTER |
| 123 | #define pTIMER2_PERIOD (volatile unsigned long *)TIMER2_PERIOD |
| 124 | #define pTIMER2_WIDTH (volatile unsigned long *)TIMER2_WIDTH |
| 125 | #define pTIMER3_CONFIG (volatile unsigned short *)TIMER3_CONFIG |
| 126 | #define pTIMER3_COUNTER (volatile unsigned long *)TIMER3_COUNTER |
| 127 | #define pTIMER3_PERIOD (volatile unsigned long *)TIMER3_PERIOD |
| 128 | #define pTIMER3_WIDTH (volatile unsigned long *)TIMER3_WIDTH |
| 129 | #define pTIMER4_CONFIG (volatile unsigned short *)TIMER4_CONFIG |
| 130 | #define pTIMER4_COUNTER (volatile unsigned long *)TIMER4_COUNTER |
| 131 | #define pTIMER4_PERIOD (volatile unsigned long *)TIMER4_PERIOD |
| 132 | #define pTIMER4_WIDTH (volatile unsigned long *)TIMER4_WIDTH |
| 133 | #define pTIMER5_CONFIG (volatile unsigned short *)TIMER5_CONFIG |
| 134 | #define pTIMER5_COUNTER (volatile unsigned long *)TIMER5_COUNTER |
| 135 | #define pTIMER5_PERIOD (volatile unsigned long *)TIMER5_PERIOD |
| 136 | #define pTIMER5_WIDTH (volatile unsigned long *)TIMER5_WIDTH |
| 137 | #define pTIMER6_CONFIG (volatile unsigned short *)TIMER6_CONFIG |
| 138 | #define pTIMER6_COUNTER (volatile unsigned long *)TIMER6_COUNTER |
| 139 | #define pTIMER6_PERIOD (volatile unsigned long *)TIMER6_PERIOD |
| 140 | #define pTIMER6_WIDTH (volatile unsigned long *)TIMER6_WIDTH |
| 141 | #define pTIMER7_CONFIG (volatile unsigned short *)TIMER7_CONFIG |
| 142 | #define pTIMER7_COUNTER (volatile unsigned long *)TIMER7_COUNTER |
| 143 | #define pTIMER7_PERIOD (volatile unsigned long *)TIMER7_PERIOD |
| 144 | #define pTIMER7_WIDTH (volatile unsigned long *)TIMER7_WIDTH |
| 145 | |
| 146 | /* Timer registers 8-11 (0xFFC0 1600-0xFFC0 16FF) */ |
| 147 | #define pTMRS8_ENABLE (volatile unsigned short *)TMRS8_ENABLE |
| 148 | #define pTMRS8_DISABLE (volatile unsigned short *)TMRS8_DISABLE |
| 149 | #define pTMRS8_STATUS (volatile unsigned long *)TMRS8_STATUS |
| 150 | #define pTIMER8_CONFIG (volatile unsigned short *)TIMER8_CONFIG |
| 151 | #define pTIMER8_COUNTER (volatile unsigned long *)TIMER8_COUNTER |
| 152 | #define pTIMER8_PERIOD (volatile unsigned long *)TIMER8_PERIOD |
| 153 | #define pTIMER8_WIDTH (volatile unsigned long *)TIMER8_WIDTH |
| 154 | #define pTIMER9_CONFIG (volatile unsigned short *)TIMER9_CONFIG |
| 155 | #define pTIMER9_COUNTER (volatile unsigned long *)TIMER9_COUNTER |
| 156 | #define pTIMER9_PERIOD (volatile unsigned long *)TIMER9_PERIOD |
| 157 | #define pTIMER9_WIDTH (volatile unsigned long *)TIMER9_WIDTH |
| 158 | #define pTIMER10_CONFIG (volatile unsigned short *)TIMER10_CONFIG |
| 159 | #define pTIMER10_COUNTER (volatile unsigned long *)TIMER10_COUNTER |
| 160 | #define pTIMER10_PERIOD (volatile unsigned long *)TIMER10_PERIOD |
| 161 | #define pTIMER10_WIDTH (volatile unsigned long *)TIMER10_WIDTH |
| 162 | #define pTIMER11_CONFIG (volatile unsigned short *)TIMER11_CONFIG |
| 163 | #define pTIMER11_COUNTER (volatile unsigned long *)TIMER11_COUNTER |
| 164 | #define pTIMER11_PERIOD (volatile unsigned long *)TIMER11_PERIOD |
| 165 | #define pTIMER11_WIDTH (volatile unsigned long *)TIMER11_WIDTH |
| 166 | #define pTMRS4_ENABLE (volatile unsigned short *)TMRS4_ENABLE |
| 167 | #define pTMRS4_DISABLE (volatile unsigned short *)TMRS4_DISABLE |
| 168 | #define pTMRS4_STATUS (volatile unsigned long *)TMRS4_STATUS |
| 169 | |
| 170 | /* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */ |
| 171 | #define pFIO0_FLAG_D (volatile unsigned short *)FIO0_FLAG_D |
| 172 | #define pFIO0_FLAG_C (volatile unsigned short *)FIO0_FLAG_C |
| 173 | #define pFIO0_FLAG_S (volatile unsigned short *)FIO0_FLAG_S |
| 174 | #define pFIO0_FLAG_T (volatile unsigned short *)FIO0_FLAG_T |
| 175 | #define pFIO0_MASKA_D (volatile unsigned short *)FIO0_MASKA_D |
| 176 | #define pFIO0_MASKA_C (volatile unsigned short *)FIO0_MASKA_C |
| 177 | #define pFIO0_MASKA_S (volatile unsigned short *)FIO0_MASKA_S |
| 178 | #define pFIO0_MASKA_T (volatile unsigned short *)FIO0_MASKA_T |
| 179 | #define pFIO0_MASKB_D (volatile unsigned short *)FIO0_MASKB_D |
| 180 | #define pFIO0_MASKB_C (volatile unsigned short *)FIO0_MASKB_C |
| 181 | #define pFIO0_MASKB_S (volatile unsigned short *)FIO0_MASKB_S |
| 182 | #define pFIO0_MASKB_T (volatile unsigned short *)FIO0_MASKB_T |
| 183 | #define pFIO0_DIR (volatile unsigned short *)FIO0_DIR |
| 184 | #define pFIO0_POLAR (volatile unsigned short *)FIO0_POLAR |
| 185 | #define pFIO0_EDGE (volatile unsigned short *)FIO0_EDGE |
| 186 | #define pFIO0_BOTH (volatile unsigned short *)FIO0_BOTH |
| 187 | #define pFIO0_INEN (volatile unsigned short *)FIO0_INEN |
| 188 | |
| 189 | /* Programmable Flag 1 registers (0xFFC0 1500-0xFFC0 15FF) */ |
| 190 | #define pFIO1_FLAG_D (volatile unsigned short *)FIO1_FLAG_D |
| 191 | #define pFIO1_FLAG_C (volatile unsigned short *)FIO1_FLAG_C |
| 192 | #define pFIO1_FLAG_S (volatile unsigned short *)FIO1_FLAG_S |
| 193 | #define pFIO1_FLAG_T (volatile unsigned short *)FIO1_FLAG_T |
| 194 | #define pFIO1_MASKA_D (volatile unsigned short *)FIO1_MASKA_D |
| 195 | #define pFIO1_MASKA_C (volatile unsigned short *)FIO1_MASKA_C |
| 196 | #define pFIO1_MASKA_S (volatile unsigned short *)FIO1_MASKA_S |
| 197 | #define pFIO1_MASKA_T (volatile unsigned short *)FIO1_MASKA_T |
| 198 | #define pFIO1_MASKB_D (volatile unsigned short *)FIO1_MASKB_D |
| 199 | #define pFIO1_MASKB_C (volatile unsigned short *)FIO1_MASKB_C |
| 200 | #define pFIO1_MASKB_S (volatile unsigned short *)FIO1_MASKB_S |
| 201 | #define pFIO1_MASKB_T (volatile unsigned short *)FIO1_MASKB_T |
| 202 | #define pFIO1_DIR (volatile unsigned short *)FIO1_DIR |
| 203 | #define pFIO1_POLAR (volatile unsigned short *)FIO1_POLAR |
| 204 | #define pFIO1_EDGE (volatile unsigned short *)FIO1_EDGE |
| 205 | #define pFIO1_BOTH (volatile unsigned short *)FIO1_BOTH |
| 206 | #define pFIO1_INEN (volatile unsigned short *)FIO1_INEN |
| 207 | |
| 208 | /* Programmable Flag registers (0xFFC0 1700-0xFFC0 17FF) */ |
| 209 | #define pFIO2_FLAG_D (volatile unsigned short *)FIO2_FLAG_D |
| 210 | #define pFIO2_FLAG_C (volatile unsigned short *)FIO2_FLAG_C |
| 211 | #define pFIO2_FLAG_S (volatile unsigned short *)FIO2_FLAG_S |
| 212 | #define pFIO2_FLAG_T (volatile unsigned short *)FIO2_FLAG_T |
| 213 | #define pFIO2_MASKA_D (volatile unsigned short *)FIO2_MASKA_D |
| 214 | #define pFIO2_MASKA_C (volatile unsigned short *)FIO2_MASKA_C |
| 215 | #define pFIO2_MASKA_S (volatile unsigned short *)FIO2_MASKA_S |
| 216 | #define pFIO2_MASKA_T (volatile unsigned short *)FIO2_MASKA_T |
| 217 | #define pFIO2_MASKB_D (volatile unsigned short *)FIO2_MASKB_D |
| 218 | #define pFIO2_MASKB_C (volatile unsigned short *)FIO2_MASKB_C |
| 219 | #define pFIO2_MASKB_S (volatile unsigned short *)FIO2_MASKB_S |
| 220 | #define pFIO2_MASKB_T (volatile unsigned short *)FIO2_MASKB_T |
| 221 | #define pFIO2_DIR (volatile unsigned short *)FIO2_DIR |
| 222 | #define pFIO2_POLAR (volatile unsigned short *)FIO2_POLAR |
| 223 | #define pFIO2_EDGE (volatile unsigned short *)FIO2_EDGE |
| 224 | #define pFIO2_BOTH (volatile unsigned short *)FIO2_BOTH |
| 225 | #define pFIO2_INEN (volatile unsigned short *)FIO2_INEN |
| 226 | |
| 227 | /* SPORT0 Controller (0xFFC00800 - 0xFFC008FF) */ |
| 228 | #define pSPORT0_TCR1 (volatile unsigned short *)SPORT0_TCR1 |
| 229 | #define pSPORT0_TCR2 (volatile unsigned short *)SPORT0_TCR2 |
| 230 | #define pSPORT0_TCLKDIV (volatile unsigned short *)SPORT0_TCLKDIV |
| 231 | #define pSPORT0_TFSDIV (volatile unsigned short *)SPORT0_TFSDIV |
| 232 | #define pSPORT0_TX (volatile unsigned long *)SPORT0_TX |
| 233 | #define pSPORT0_RX (volatile unsigned long *)SPORT0_RX |
| 234 | #define pSPORT0_TX32 ((volatile long *)SPORT0_TX) |
| 235 | #define pSPORT0_RX32 ((volatile long *)SPORT0_RX) |
| 236 | #define pSPORT0_TX16 ((volatile unsigned short *)SPORT0_TX) |
| 237 | #define pSPORT0_RX16 ((volatile unsigned short *)SPORT0_RX) |
| 238 | #define pSPORT0_RCR1 (volatile unsigned short *)SPORT0_RCR1 |
| 239 | #define pSPORT0_RCR2 (volatile unsigned short *)SPORT0_RCR2 |
| 240 | #define pSPORT0_RCLKDIV (volatile unsigned short *)SPORT0_RCLKDIV |
| 241 | #define pSPORT0_RFSDIV (volatile unsigned short *)SPORT0_RFSDIV |
| 242 | #define pSPORT0_STAT (volatile unsigned short *)SPORT0_STAT |
| 243 | #define pSPORT0_CHNL (volatile unsigned short *)SPORT0_CHNL |
| 244 | #define pSPORT0_MCMC1 (volatile unsigned short *)SPORT0_MCMC1 |
| 245 | #define pSPORT0_MCMC2 (volatile unsigned short *)SPORT0_MCMC2 |
| 246 | #define pSPORT0_MTCS0 (volatile unsigned long *)SPORT0_MTCS0 |
| 247 | #define pSPORT0_MTCS1 (volatile unsigned long *)SPORT0_MTCS1 |
| 248 | #define pSPORT0_MTCS2 (volatile unsigned long *)SPORT0_MTCS2 |
| 249 | #define pSPORT0_MTCS3 (volatile unsigned long *)SPORT0_MTCS3 |
| 250 | #define pSPORT0_MRCS0 (volatile unsigned long *)SPORT0_MRCS0 |
| 251 | #define pSPORT0_MRCS1 (volatile unsigned long *)SPORT0_MRCS1 |
| 252 | #define pSPORT0_MRCS2 (volatile unsigned long *)SPORT0_MRCS2 |
| 253 | #define pSPORT0_MRCS3 (volatile unsigned long *)SPORT0_MRCS3 |
| 254 | |
| 255 | /* SPORT1 Controller (0xFFC00900 - 0xFFC009FF) */ |
| 256 | #define pSPORT1_TCR1 (volatile unsigned short *)SPORT1_TCR1 |
| 257 | #define pSPORT1_TCR2 (volatile unsigned short *)SPORT1_TCR2 |
| 258 | #define pSPORT1_TCLKDIV (volatile unsigned short *)SPORT1_TCLKDIV |
| 259 | #define pSPORT1_TFSDIV (volatile unsigned short *)SPORT1_TFSDIV |
| 260 | #define pSPORT1_TX (volatile unsigned long *)SPORT1_TX |
| 261 | #define pSPORT1_RX (volatile unsigned long *)SPORT1_RX |
| 262 | #define pSPORT1_TX32 ((volatile long *)SPORT1_TX) |
| 263 | #define pSPORT1_RX32 ((volatile long *)SPORT1_RX) |
| 264 | #define pSPORT1_TX16 ((volatile unsigned short *)SPORT1_TX) |
| 265 | #define pSPORT1_RX16 ((volatile unsigned short *)SPORT1_RX) |
| 266 | #define pSPORT1_RCR1 (volatile unsigned short *)SPORT1_RCR1 |
| 267 | #define pSPORT1_RCR2 (volatile unsigned short *)SPORT1_RCR2 |
| 268 | #define pSPORT1_RCLKDIV (volatile unsigned short *)SPORT1_RCLKDIV |
| 269 | #define pSPORT1_RFSDIV (volatile unsigned short *)SPORT1_RFSDIV |
| 270 | #define pSPORT1_STAT (volatile unsigned short *)SPORT1_STAT |
| 271 | #define pSPORT1_CHNL (volatile unsigned short *)SPORT1_CHNL |
| 272 | #define pSPORT1_MCMC1 (volatile unsigned short *)SPORT1_MCMC1 |
| 273 | #define pSPORT1_MCMC2 (volatile unsigned short *)SPORT1_MCMC2 |
| 274 | #define pSPORT1_MTCS0 (volatile unsigned long *)SPORT1_MTCS0 |
| 275 | #define pSPORT1_MTCS1 (volatile unsigned long *)SPORT1_MTCS1 |
| 276 | #define pSPORT1_MTCS2 (volatile unsigned long *)SPORT1_MTCS2 |
| 277 | #define pSPORT1_MTCS3 (volatile unsigned long *)SPORT1_MTCS3 |
| 278 | #define pSPORT1_MRCS0 (volatile unsigned long *)SPORT1_MRCS0 |
| 279 | #define pSPORT1_MRCS1 (volatile unsigned long *)SPORT1_MRCS1 |
| 280 | #define pSPORT1_MRCS2 (volatile unsigned long *)SPORT1_MRCS2 |
| 281 | #define pSPORT1_MRCS3 (volatile unsigned long *)SPORT1_MRCS3 |
| 282 | |
| 283 | /* Asynchronous Memory Controller - External Bus Interface Unit */ |
| 284 | #define pEBIU_AMGCTL (volatile unsigned short *)EBIU_AMGCTL |
| 285 | #define pEBIU_AMBCTL0 (volatile unsigned long *)EBIU_AMBCTL0 |
| 286 | #define pEBIU_AMBCTL1 (volatile unsigned long *)EBIU_AMBCTL1 |
| 287 | |
| 288 | /* SDRAM Controller External Bus Interface Unit (0xFFC00A00 - 0xFFC00AFF) */ |
| 289 | #define pEBIU_SDGCTL (volatile unsigned long *)EBIU_SDGCTL |
| 290 | #define pEBIU_SDBCTL (volatile unsigned long *)EBIU_SDBCTL |
| 291 | #define pEBIU_SDRRC (volatile unsigned short *)EBIU_SDRRC |
| 292 | #define pEBIU_SDSTAT (volatile unsigned short *)EBIU_SDSTAT |
| 293 | |
| 294 | /* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0 10FF)*/ |
| 295 | #define pPPI0_CONTROL (volatile unsigned short *)PPI0_CONTROL |
| 296 | #define pPPI0_STATUS (volatile unsigned short *)PPI0_STATUS |
| 297 | #define pPPI0_COUNT (volatile unsigned short *)PPI0_COUNT |
| 298 | #define pPPI0_DELAY (volatile unsigned short *)PPI0_DELAY |
| 299 | #define pPPI0_FRAME (volatile unsigned short *)PPI0_FRAME |
| 300 | |
| 301 | /* Parallel Peripheral Interface (PPI) 1 registers (0xFFC0 1300-0xFFC0 13FF)*/ |
| 302 | #define pPPI1_CONTROL (volatile unsigned short *)PPI1_CONTROL |
| 303 | #define pPPI1_STATUS (volatile unsigned short *)PPI1_STATUS |
| 304 | #define pPPI1_COUNT (volatile unsigned short *)PPI1_COUNT |
| 305 | #define pPPI1_DELAY (volatile unsigned short *)PPI1_DELAY |
| 306 | #define pPPI1_FRAME (volatile unsigned short *)PPI1_FRAME |
| 307 | |
| 308 | /*DMA Traffic controls*/ |
| 309 | #define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER) |
| 310 | #define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT) |
| 311 | #define pDMA_TC_PER ((volatile unsigned short *)DMA_TC_PER) |
| 312 | #define pDMA_TC_CNT ((volatile unsigned short *)DMA_TC_CNT) |
| 313 | |
| 314 | /* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */ |
| 315 | #define pDMA1_0_CONFIG (volatile unsigned short *)DMA1_0_CONFIG |
| 316 | #define pDMA1_0_NEXT_DESC_PTR (volatile void **)DMA1_0_NEXT_DESC_PTR |
| 317 | #define pDMA1_0_START_ADDR (volatile void **)DMA1_0_START_ADDR |
| 318 | #define pDMA1_0_X_COUNT (volatile unsigned short *)DMA1_0_X_COUNT |
| 319 | #define pDMA1_0_Y_COUNT (volatile unsigned short *)DMA1_0_Y_COUNT |
| 320 | #define pDMA1_0_X_MODIFY (volatile unsigned short *)DMA1_0_X_MODIFY |
| 321 | #define pDMA1_0_Y_MODIFY (volatile unsigned short *)DMA1_0_Y_MODIFY |
| 322 | #define pDMA1_0_CURR_DESC_PTR (volatile void **)DMA1_0_CURR_DESC_PTR |
| 323 | #define pDMA1_0_CURR_ADDR (volatile void **)DMA1_0_CURR_ADDR |
| 324 | #define pDMA1_0_CURR_X_COUNT (volatile unsigned short *)DMA1_0_CURR_X_COUNT |
| 325 | #define pDMA1_0_CURR_Y_COUNT (volatile unsigned short *)DMA1_0_CURR_Y_COUNT |
| 326 | #define pDMA1_0_IRQ_STATUS (volatile unsigned short *)DMA1_0_IRQ_STATUS |
| 327 | #define pDMA1_0_PERIPHERAL_MAP (volatile unsigned short *)DMA1_0_PERIPHERAL_MAP |
| 328 | #define pDMA1_1_CONFIG (volatile unsigned short *)DMA1_1_CONFIG |
| 329 | #define pDMA1_1_NEXT_DESC_PTR (volatile void **)DMA1_1_NEXT_DESC_PTR |
| 330 | #define pDMA1_1_START_ADDR (volatile void **)DMA1_1_START_ADDR |
| 331 | #define pDMA1_1_X_COUNT (volatile unsigned short *)DMA1_1_X_COUNT |
| 332 | #define pDMA1_1_Y_COUNT (volatile unsigned short *)DMA1_1_Y_COUNT |
| 333 | #define pDMA1_1_X_MODIFY (volatile unsigned short *)DMA1_1_X_MODIFY |
| 334 | #define pDMA1_1_Y_MODIFY (volatile unsigned short *)DMA1_1_Y_MODIFY |
| 335 | #define pDMA1_1_CURR_DESC_PTR (volatile void **)DMA1_1_CURR_DESC_PTR |
| 336 | #define pDMA1_1_CURR_ADDR (volatile void **)DMA1_1_CURR_ADDR |
| 337 | #define pDMA1_1_CURR_X_COUNT (volatile unsigned short *)DMA1_1_CURR_X_COUNT |
| 338 | #define pDMA1_1_CURR_Y_COUNT (volatile unsigned short *)DMA1_1_CURR_Y_COUNT |
| 339 | #define pDMA1_1_IRQ_STATUS (volatile unsigned short *)DMA1_1_IRQ_STATUS |
| 340 | #define pDMA1_1_PERIPHERAL_MAP (volatile unsigned short *)DMA1_1_PERIPHERAL_MAP |
| 341 | #define pDMA1_2_CONFIG (volatile unsigned short *)DMA1_2_CONFIG |
| 342 | #define pDMA1_2_NEXT_DESC_PTR (volatile void **)DMA1_2_NEXT_DESC_PTR |
| 343 | #define pDMA1_2_START_ADDR (volatile void **)DMA1_2_START_ADDR |
| 344 | #define pDMA1_2_X_COUNT (volatile unsigned short *)DMA1_2_X_COUNT |
| 345 | #define pDMA1_2_Y_COUNT (volatile unsigned short *)DMA1_2_Y_COUNT |
| 346 | #define pDMA1_2_X_MODIFY (volatile unsigned short *)DMA1_2_X_MODIFY |
| 347 | #define pDMA1_2_Y_MODIFY (volatile unsigned short *)DMA1_2_Y_MODIFY |
| 348 | #define pDMA1_2_CURR_DESC_PTR (volatile void **)DMA1_2_CURR_DESC_PTR |
| 349 | #define pDMA1_2_CURR_ADDR (volatile void **)DMA1_2_CURR_ADDR |
| 350 | #define pDMA1_2_CURR_X_COUNT (volatile unsigned short *)DMA1_2_CURR_X_COUNT |
| 351 | #define pDMA1_2_CURR_Y_COUNT (volatile unsigned short *)DMA1_2_CURR_Y_COUNT |
| 352 | #define pDMA1_2_IRQ_STATUS (volatile unsigned short *)DMA1_2_IRQ_STATUS |
| 353 | #define pDMA1_2_PERIPHERAL_MAP (volatile unsigned short *)DMA1_2_PERIPHERAL_MAP |
| 354 | #define pDMA1_3_CONFIG (volatile unsigned short *)DMA1_3_CONFIG |
| 355 | #define pDMA1_3_NEXT_DESC_PTR (volatile void **)DMA1_3_NEXT_DESC_PTR |
| 356 | #define pDMA1_3_START_ADDR (volatile void **)DMA1_3_START_ADDR |
| 357 | #define pDMA1_3_X_COUNT (volatile unsigned short *)DMA1_3_X_COUNT |
| 358 | #define pDMA1_3_Y_COUNT (volatile unsigned short *)DMA1_3_Y_COUNT |
| 359 | #define pDMA1_3_X_MODIFY (volatile unsigned short *)DMA1_3_X_MODIFY |
| 360 | #define pDMA1_3_Y_MODIFY (volatile unsigned short *)DMA1_3_Y_MODIFY |
| 361 | #define pDMA1_3_CURR_DESC_PTR (volatile void **)DMA1_3_CURR_DESC_PTR |
| 362 | #define pDMA1_3_CURR_ADDR (volatile void **)DMA1_3_CURR_ADDR |
| 363 | #define pDMA1_3_CURR_X_COUNT (volatile unsigned short *)DMA1_3_CURR_X_COUNT |
| 364 | #define pDMA1_3_CURR_Y_COUNT (volatile unsigned short *)DMA1_3_CURR_Y_COUNT |
| 365 | #define pDMA1_3_IRQ_STATUS (volatile unsigned short *)DMA1_3_IRQ_STATUS |
| 366 | #define pDMA1_3_PERIPHERAL_MAP (volatile unsigned short *)DMA1_3_PERIPHERAL_MAP |
| 367 | #define pDMA1_4_CONFIG (volatile unsigned short *)DMA1_4_CONFIG |
| 368 | #define pDMA1_4_NEXT_DESC_PTR (volatile void **)DMA1_4_NEXT_DESC_PTR |
| 369 | #define pDMA1_4_START_ADDR (volatile void **)DMA1_4_START_ADDR |
| 370 | #define pDMA1_4_X_COUNT (volatile unsigned short *)DMA1_4_X_COUNT |
| 371 | #define pDMA1_4_Y_COUNT (volatile unsigned short *)DMA1_4_Y_COUNT |
| 372 | #define pDMA1_4_X_MODIFY (volatile unsigned short *)DMA1_4_X_MODIFY |
| 373 | #define pDMA1_4_Y_MODIFY (volatile unsigned short *)DMA1_4_Y_MODIFY |
| 374 | #define pDMA1_4_CURR_DESC_PTR (volatile void **)DMA1_4_CURR_DESC_PTR |
| 375 | #define pDMA1_4_CURR_ADDR (volatile void **)DMA1_4_CURR_ADDR |
| 376 | #define pDMA1_4_CURR_X_COUNT (volatile unsigned short *)DMA1_4_CURR_X_COUNT |
| 377 | #define pDMA1_4_CURR_Y_COUNT (volatile unsigned short *)DMA1_4_CURR_Y_COUNT |
| 378 | #define pDMA1_4_IRQ_STATUS (volatile unsigned short *)DMA1_4_IRQ_STATUS |
| 379 | #define pDMA1_4_PERIPHERAL_MAP (volatile unsigned short *)DMA1_4_PERIPHERAL_MAP |
| 380 | #define pDMA1_5_CONFIG (volatile unsigned short *)DMA1_5_CONFIG |
| 381 | #define pDMA1_5_NEXT_DESC_PTR (volatile void **)DMA1_5_NEXT_DESC_PTR |
| 382 | #define pDMA1_5_START_ADDR (volatile void **)DMA1_5_START_ADDR |
| 383 | #define pDMA1_5_X_COUNT (volatile unsigned short *)DMA1_5_X_COUNT |
| 384 | #define pDMA1_5_Y_COUNT (volatile unsigned short *)DMA1_5_Y_COUNT |
| 385 | #define pDMA1_5_X_MODIFY (volatile unsigned short *)DMA1_5_X_MODIFY |
| 386 | #define pDMA1_5_Y_MODIFY (volatile unsigned short *)DMA1_5_Y_MODIFY |
| 387 | #define pDMA1_5_CURR_DESC_PTR (volatile void **)DMA1_5_CURR_DESC_PTR |
| 388 | #define pDMA1_5_CURR_ADDR (volatile void **)DMA1_5_CURR_ADDR |
| 389 | #define pDMA1_5_CURR_X_COUNT (volatile unsigned short *)DMA1_5_CURR_X_COUNT |
| 390 | #define pDMA1_5_CURR_Y_COUNT (volatile unsigned short *)DMA1_5_CURR_Y_COUNT |
| 391 | #define pDMA1_5_IRQ_STATUS (volatile unsigned short *)DMA1_5_IRQ_STATUS |
| 392 | #define pDMA1_5_PERIPHERAL_MAP (volatile unsigned short *)DMA1_5_PERIPHERAL_MAP |
| 393 | #define pDMA1_6_CONFIG (volatile unsigned short *)DMA1_6_CONFIG |
| 394 | #define pDMA1_6_NEXT_DESC_PTR (volatile void **)DMA1_6_NEXT_DESC_PTR |
| 395 | #define pDMA1_6_START_ADDR (volatile void **)DMA1_6_START_ADDR |
| 396 | #define pDMA1_6_X_COUNT (volatile unsigned short *)DMA1_6_X_COUNT |
| 397 | #define pDMA1_6_Y_COUNT (volatile unsigned short *)DMA1_6_Y_COUNT |
| 398 | #define pDMA1_6_X_MODIFY (volatile unsigned short *)DMA1_6_X_MODIFY |
| 399 | #define pDMA1_6_Y_MODIFY (volatile unsigned short *)DMA1_6_Y_MODIFY |
| 400 | #define pDMA1_6_CURR_DESC_PTR (volatile void **)DMA1_6_CURR_DESC_PTR |
| 401 | #define pDMA1_6_CURR_ADDR (volatile void **)DMA1_6_CURR_ADDR |
| 402 | #define pDMA1_6_CURR_X_COUNT (volatile unsigned short *)DMA1_6_CURR_X_COUNT |
| 403 | #define pDMA1_6_CURR_Y_COUNT (volatile unsigned short *)DMA1_6_CURR_Y_COUNT |
| 404 | #define pDMA1_6_IRQ_STATUS (volatile unsigned short *)DMA1_6_IRQ_STATUS |
| 405 | #define pDMA1_6_PERIPHERAL_MAP (volatile unsigned short *)DMA1_6_PERIPHERAL_MAP |
| 406 | #define pDMA1_7_CONFIG (volatile unsigned short *)DMA1_7_CONFIG |
| 407 | #define pDMA1_7_NEXT_DESC_PTR (volatile void **)DMA1_7_NEXT_DESC_PTR |
| 408 | #define pDMA1_7_START_ADDR (volatile void **)DMA1_7_START_ADDR |
| 409 | #define pDMA1_7_X_COUNT (volatile unsigned short *)DMA1_7_X_COUNT |
| 410 | #define pDMA1_7_Y_COUNT (volatile unsigned short *)DMA1_7_Y_COUNT |
| 411 | #define pDMA1_7_X_MODIFY (volatile unsigned short *)DMA1_7_X_MODIFY |
| 412 | #define pDMA1_7_Y_MODIFY (volatile unsigned short *)DMA1_7_Y_MODIFY |
| 413 | #define pDMA1_7_CURR_DESC_PTR (volatile void **)DMA1_7_CURR_DESC_PTR |
| 414 | #define pDMA1_7_CURR_ADDR (volatile void **)DMA1_7_CURR_ADDR |
| 415 | #define pDMA1_7_CURR_X_COUNT (volatile unsigned short *)DMA1_7_CURR_X_COUNT |
| 416 | #define pDMA1_7_CURR_Y_COUNT (volatile unsigned short *)DMA1_7_CURR_Y_COUNT |
| 417 | #define pDMA1_7_IRQ_STATUS (volatile unsigned short *)DMA1_7_IRQ_STATUS |
| 418 | #define pDMA1_7_PERIPHERAL_MAP (volatile unsigned short *)DMA1_7_PERIPHERAL_MAP |
| 419 | #define pDMA1_8_CONFIG (volatile unsigned short *)DMA1_8_CONFIG |
| 420 | #define pDMA1_8_NEXT_DESC_PTR (volatile void **)DMA1_8_NEXT_DESC_PTR |
| 421 | #define pDMA1_8_START_ADDR (volatile void **)DMA1_8_START_ADDR |
| 422 | #define pDMA1_8_X_COUNT (volatile unsigned short *)DMA1_8_X_COUNT |
| 423 | #define pDMA1_8_Y_COUNT (volatile unsigned short *)DMA1_8_Y_COUNT |
| 424 | #define pDMA1_8_X_MODIFY (volatile unsigned short *)DMA1_8_X_MODIFY |
| 425 | #define pDMA1_8_Y_MODIFY (volatile unsigned short *)DMA1_8_Y_MODIFY |
| 426 | #define pDMA1_8_CURR_DESC_PTR (volatile void **)DMA1_8_CURR_DESC_PTR |
| 427 | #define pDMA1_8_CURR_ADDR (volatile void **)DMA1_8_CURR_ADDR |
| 428 | #define pDMA1_8_CURR_X_COUNT (volatile unsigned short *)DMA1_8_CURR_X_COUNT |
| 429 | #define pDMA1_8_CURR_Y_COUNT (volatile unsigned short *)DMA1_8_CURR_Y_COUNT |
| 430 | #define pDMA1_8_IRQ_STATUS (volatile unsigned short *)DMA1_8_IRQ_STATUS |
| 431 | #define pDMA1_8_PERIPHERAL_MAP (volatile unsigned short *)DMA1_8_PERIPHERAL_MAP |
| 432 | #define pDMA1_9_CONFIG (volatile unsigned short *)DMA1_9_CONFIG |
| 433 | #define pDMA1_9_NEXT_DESC_PTR (volatile void **)DMA1_9_NEXT_DESC_PTR |
| 434 | #define pDMA1_9_START_ADDR (volatile void **)DMA1_9_START_ADDR |
| 435 | #define pDMA1_9_X_COUNT (volatile unsigned short *)DMA1_9_X_COUNT |
| 436 | #define pDMA1_9_Y_COUNT (volatile unsigned short *)DMA1_9_Y_COUNT |
| 437 | #define pDMA1_9_X_MODIFY (volatile unsigned short *)DMA1_9_X_MODIFY |
| 438 | #define pDMA1_9_Y_MODIFY (volatile unsigned short *)DMA1_9_Y_MODIFY |
| 439 | #define pDMA1_9_CURR_DESC_PTR (volatile void **)DMA1_9_CURR_DESC_PTR |
| 440 | #define pDMA1_9_CURR_ADDR (volatile void **)DMA1_9_CURR_ADDR |
| 441 | #define pDMA1_9_CURR_X_COUNT (volatile unsigned short *)DMA1_9_CURR_X_COUNT |
| 442 | #define pDMA1_9_CURR_Y_COUNT (volatile unsigned short *)DMA1_9_CURR_Y_COUNT |
| 443 | #define pDMA1_9_IRQ_STATUS (volatile unsigned short *)DMA1_9_IRQ_STATUS |
| 444 | #define pDMA1_9_PERIPHERAL_MAP (volatile unsigned short *)DMA1_9_PERIPHERAL_MAP |
| 445 | #define pDMA1_10_CONFIG (volatile unsigned short *)DMA1_10_CONFIG |
| 446 | #define pDMA1_10_NEXT_DESC_PTR (volatile void **)DMA1_10_NEXT_DESC_PTR |
| 447 | #define pDMA1_10_START_ADDR (volatile void **)DMA1_10_START_ADDR |
| 448 | #define pDMA1_10_X_COUNT (volatile unsigned short *)DMA1_10_X_COUNT |
| 449 | #define pDMA1_10_Y_COUNT (volatile unsigned short *)DMA1_10_Y_COUNT |
| 450 | #define pDMA1_10_X_MODIFY (volatile unsigned short *)DMA1_10_X_MODIFY |
| 451 | #define pDMA1_10_Y_MODIFY (volatile unsigned short *)DMA1_10_Y_MODIFY |
| 452 | #define pDMA1_10_CURR_DESC_PTR (volatile void **)DMA1_10_CURR_DESC_PTR |
| 453 | #define pDMA1_10_CURR_ADDR (volatile void **)DMA1_10_CURR_ADDR |
| 454 | #define pDMA1_10_CURR_X_COUNT (volatile unsigned short *)DMA1_10_CURR_X_COUNT |
| 455 | #define pDMA1_10_CURR_Y_COUNT (volatile unsigned short *)DMA1_10_CURR_Y_COUNT |
| 456 | #define pDMA1_10_IRQ_STATUS (volatile unsigned short *)DMA1_10_IRQ_STATUS |
| 457 | #define pDMA1_10_PERIPHERAL_MAP (volatile unsigned short *)DMA1_10_PERIPHERAL_MAP |
| 458 | #define pDMA1_11_CONFIG (volatile unsigned short *)DMA1_11_CONFIG |
| 459 | #define pDMA1_11_NEXT_DESC_PTR (volatile void **)DMA1_11_NEXT_DESC_PTR |
| 460 | #define pDMA1_11_START_ADDR (volatile void **)DMA1_11_START_ADDR |
| 461 | #define pDMA1_11_X_COUNT (volatile unsigned short *)DMA1_11_X_COUNT |
| 462 | #define pDMA1_11_Y_COUNT (volatile unsigned short *)DMA1_11_Y_COUNT |
| 463 | #define pDMA1_11_X_MODIFY (volatile signed short *)DMA1_11_X_MODIFY |
| 464 | #define pDMA1_11_Y_MODIFY (volatile signed short *)DMA1_11_Y_MODIFY |
| 465 | #define pDMA1_11_CURR_DESC_PTR (volatile void **)DMA1_11_CURR_DESC_PTR |
| 466 | #define pDMA1_11_CURR_ADDR (volatile void **)DMA1_11_CURR_ADDR |
| 467 | #define pDMA1_11_CURR_X_COUNT (volatile unsigned short *)DMA1_11_CURR_X_COUNT |
| 468 | #define pDMA1_11_CURR_Y_COUNT (volatile unsigned short *)DMA1_11_CURR_Y_COUNT |
| 469 | #define pDMA1_11_IRQ_STATUS (volatile unsigned short *)DMA1_11_IRQ_STATUS |
| 470 | #define pDMA1_11_PERIPHERAL_MAP (volatile unsigned short *)DMA1_11_PERIPHERAL_MAP |
| 471 | |
| 472 | /* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF)*/ |
| 473 | #define pMDMA1_D0_CONFIG (volatile unsigned short *)MDMA1_D0_CONFIG |
| 474 | #define pMDMA1_D0_NEXT_DESC_PTR (volatile void **)MDMA1_D0_NEXT_DESC_PTR |
| 475 | #define pMDMA1_D0_START_ADDR (volatile void **)MDMA1_D0_START_ADDR |
| 476 | #define pMDMA1_D0_X_COUNT (volatile unsigned short *)MDMA1_D0_X_COUNT |
| 477 | #define pMDMA1_D0_Y_COUNT (volatile unsigned short *)MDMA1_D0_Y_COUNT |
| 478 | #define pMDMA1_D0_X_MODIFY (volatile signed short *)MDMA1_D0_X_MODIFY |
| 479 | #define pMDMA1_D0_Y_MODIFY (volatile signed short *)MDMA1_D0_Y_MODIFY |
| 480 | #define pMDMA1_D0_CURR_DESC_PTR (volatile void **)MDMA1_D0_CURR_DESC_PTR |
| 481 | #define pMDMA1_D0_CURR_ADDR (volatile void **)MDMA1_D0_CURR_ADDR |
| 482 | #define pMDMA1_D0_CURR_X_COUNT (volatile unsigned short *)MDMA1_D0_CURR_X_COUNT |
| 483 | #define pMDMA1_D0_CURR_Y_COUNT (volatile unsigned short *)MDMA1_D0_CURR_Y_COUNT |
| 484 | #define pMDMA1_D0_IRQ_STATUS (volatile unsigned short *)MDMA1_D0_IRQ_STATUS |
| 485 | #define pMDMA1_D0_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_D0_PERIPHERAL_MAP |
| 486 | #define pMDMA1_S0_CONFIG (volatile unsigned short *)MDMA1_S0_CONFIG |
| 487 | #define pMDMA1_S0_NEXT_DESC_PTR (volatile void **)MDMA1_S0_NEXT_DESC_PTR |
| 488 | #define pMDMA1_S0_START_ADDR (volatile void **)MDMA1_S0_START_ADDR |
| 489 | #define pMDMA1_S0_X_COUNT (volatile unsigned short *)MDMA1_S0_X_COUNT |
| 490 | #define pMDMA1_S0_Y_COUNT (volatile unsigned short *)MDMA1_S0_Y_COUNT |
| 491 | #define pMDMA1_S0_X_MODIFY (volatile signed short *)MDMA1_S0_X_MODIFY |
| 492 | #define pMDMA1_S0_Y_MODIFY (volatile signed short *)MDMA1_S0_Y_MODIFY |
| 493 | #define pMDMA1_S0_CURR_DESC_PTR (volatile void **)MDMA1_S0_CURR_DESC_PTR |
| 494 | #define pMDMA1_S0_CURR_ADDR (volatile void **)MDMA1_S0_CURR_ADDR |
| 495 | #define pMDMA1_S0_CURR_X_COUNT (volatile unsigned short *)MDMA1_S0_CURR_X_COUNT |
| 496 | #define pMDMA1_S0_CURR_Y_COUNT (volatile unsigned short *)MDMA1_S0_CURR_Y_COUNT |
| 497 | #define pMDMA1_S0_IRQ_STATUS (volatile unsigned short *)MDMA1_S0_IRQ_STATUS |
| 498 | #define pMDMA1_S0_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_S0_PERIPHERAL_MAP |
| 499 | #define pMDMA1_D1_CONFIG (volatile unsigned short *)MDMA1_D1_CONFIG |
| 500 | #define pMDMA1_D1_NEXT_DESC_PTR (volatile void **)MDMA1_D1_NEXT_DESC_PTR |
| 501 | #define pMDMA1_D1_START_ADDR (volatile void **)MDMA1_D1_START_ADDR |
| 502 | #define pMDMA1_D1_X_COUNT (volatile unsigned short *)MDMA1_D1_X_COUNT |
| 503 | #define pMDMA1_D1_Y_COUNT (volatile unsigned short *)MDMA1_D1_Y_COUNT |
| 504 | #define pMDMA1_D1_X_MODIFY (volatile signed short *)MDMA1_D1_X_MODIFY |
| 505 | #define pMDMA1_D1_Y_MODIFY (volatile signed short *)MDMA1_D1_Y_MODIFY |
| 506 | #define pMDMA1_D1_CURR_DESC_PTR (volatile void **)MDMA1_D1_CURR_DESC_PTR |
| 507 | #define pMDMA1_D1_CURR_ADDR (volatile void **)MDMA1_D1_CURR_ADDR |
| 508 | #define pMDMA1_D1_CURR_X_COUNT (volatile unsigned short *)MDMA1_D1_CURR_X_COUNT |
| 509 | #define pMDMA1_D1_CURR_Y_COUNT (volatile unsigned short *)MDMA1_D1_CURR_Y_COUNT |
| 510 | #define pMDMA1_D1_IRQ_STATUS (volatile unsigned short *)MDMA1_D1_IRQ_STATUS |
| 511 | #define pMDMA1_D1_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_D1_PERIPHERAL_MAP |
| 512 | #define pMDMA1_S1_CONFIG (volatile unsigned short *)MDMA1_S1_CONFIG |
| 513 | #define pMDMA1_S1_NEXT_DESC_PTR (volatile void **)MDMA1_S1_NEXT_DESC_PTR |
| 514 | #define pMDMA1_S1_START_ADDR (volatile void **)MDMA1_S1_START_ADDR |
| 515 | #define pMDMA1_S1_X_COUNT (volatile unsigned short *)MDMA1_S1_X_COUNT |
| 516 | #define pMDMA1_S1_Y_COUNT (volatile unsigned short *)MDMA1_S1_Y_COUNT |
| 517 | #define pMDMA1_S1_X_MODIFY (volatile signed short *)MDMA1_S1_X_MODIFY |
| 518 | #define pMDMA1_S1_Y_MODIFY (volatile signed short *)MDMA1_S1_Y_MODIFY |
| 519 | #define pMDMA1_S1_CURR_DESC_PTR (volatile void **)MDMA1_S1_CURR_DESC_PTR |
| 520 | #define pMDMA1_S1_CURR_ADDR (volatile void **)MDMA1_S1_CURR_ADDR |
| 521 | #define pMDMA1_S1_CURR_X_COUNT (volatile unsigned short *)MDMA1_S1_CURR_X_COUNT |
| 522 | #define pMDMA1_S1_CURR_Y_COUNT (volatile unsigned short *)MDMA1_S1_CURR_Y_COUNT |
| 523 | #define pMDMA1_S1_IRQ_STATUS (volatile unsigned short *)MDMA1_S1_IRQ_STATUS |
| 524 | #define pMDMA1_S1_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_S1_PERIPHERAL_MAP |
| 525 | |
| 526 | /* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */ |
| 527 | #define pDMA2_0_CONFIG (volatile unsigned short *)DMA2_0_CONFIG |
| 528 | #define pDMA2_0_NEXT_DESC_PTR (volatile void **)DMA2_0_NEXT_DESC_PTR |
| 529 | #define pDMA2_0_START_ADDR (volatile void **)DMA2_0_START_ADDR |
| 530 | #define pDMA2_0_X_COUNT (volatile unsigned short *)DMA2_0_X_COUNT |
| 531 | #define pDMA2_0_Y_COUNT (volatile unsigned short *)DMA2_0_Y_COUNT |
| 532 | #define pDMA2_0_X_MODIFY (volatile signed short *)DMA2_0_X_MODIFY |
| 533 | #define pDMA2_0_Y_MODIFY (volatile signed short *)DMA2_0_Y_MODIFY |
| 534 | #define pDMA2_0_CURR_DESC_PTR (volatile void **)DMA2_0_CURR_DESC_PTR |
| 535 | #define pDMA2_0_CURR_ADDR (volatile void **)DMA2_0_CURR_ADDR |
| 536 | #define pDMA2_0_CURR_X_COUNT (volatile unsigned short *)DMA2_0_CURR_X_COUNT |
| 537 | #define pDMA2_0_CURR_Y_COUNT (volatile unsigned short *)DMA2_0_CURR_Y_COUNT |
| 538 | #define pDMA2_0_IRQ_STATUS (volatile unsigned short *)DMA2_0_IRQ_STATUS |
| 539 | #define pDMA2_0_PERIPHERAL_MAP (volatile unsigned short *)DMA2_0_PERIPHERAL_MAP |
| 540 | #define pDMA2_1_CONFIG (volatile unsigned short *)DMA2_1_CONFIG |
| 541 | #define pDMA2_1_NEXT_DESC_PTR (volatile void **)DMA2_1_NEXT_DESC_PTR |
| 542 | #define pDMA2_1_START_ADDR (volatile void **)DMA2_1_START_ADDR |
| 543 | #define pDMA2_1_X_COUNT (volatile unsigned short *)DMA2_1_X_COUNT |
| 544 | #define pDMA2_1_Y_COUNT (volatile unsigned short *)DMA2_1_Y_COUNT |
| 545 | #define pDMA2_1_X_MODIFY (volatile signed short *)DMA2_1_X_MODIFY |
| 546 | #define pDMA2_1_Y_MODIFY (volatile signed short *)DMA2_1_Y_MODIFY |
| 547 | #define pDMA2_1_CURR_DESC_PTR (volatile void **)DMA2_1_CURR_DESC_PTR |
| 548 | #define pDMA2_1_CURR_ADDR (volatile void **)DMA2_1_CURR_ADDR |
| 549 | #define pDMA2_1_CURR_X_COUNT (volatile unsigned short *)DMA2_1_CURR_X_COUNT |
| 550 | #define pDMA2_1_CURR_Y_COUNT (volatile unsigned short *)DMA2_1_CURR_Y_COUNT |
| 551 | #define pDMA2_1_IRQ_STATUS (volatile unsigned short *)DMA2_1_IRQ_STATUS |
| 552 | #define pDMA2_1_PERIPHERAL_MAP (volatile unsigned short *)DMA2_1_PERIPHERAL_MAP |
| 553 | #define pDMA2_2_CONFIG (volatile unsigned short *)DMA2_2_CONFIG |
| 554 | #define pDMA2_2_NEXT_DESC_PTR (volatile void **)DMA2_2_NEXT_DESC_PTR |
| 555 | #define pDMA2_2_START_ADDR (volatile void **)DMA2_2_START_ADDR |
| 556 | #define pDMA2_2_X_COUNT (volatile unsigned short *)DMA2_2_X_COUNT |
| 557 | #define pDMA2_2_Y_COUNT (volatile unsigned short *)DMA2_2_Y_COUNT |
| 558 | #define pDMA2_2_X_MODIFY (volatile signed short *)DMA2_2_X_MODIFY |
| 559 | #define pDMA2_2_Y_MODIFY (volatile signed short *)DMA2_2_Y_MODIFY |
| 560 | #define pDMA2_2_CURR_DESC_PTR (volatile void **)DMA2_2_CURR_DESC_PTR |
| 561 | #define pDMA2_2_CURR_ADDR (volatile void **)DMA2_2_CURR_ADDR |
| 562 | #define pDMA2_2_CURR_X_COUNT (volatile unsigned short *)DMA2_2_CURR_X_COUNT |
| 563 | #define pDMA2_2_CURR_Y_COUNT (volatile unsigned short *)DMA2_2_CURR_Y_COUNT |
| 564 | #define pDMA2_2_IRQ_STATUS (volatile unsigned short *)DMA2_2_IRQ_STATUS |
| 565 | #define pDMA2_2_PERIPHERAL_MAP (volatile unsigned short *)DMA2_2_PERIPHERAL_MAP |
| 566 | #define pDMA2_3_CONFIG (volatile unsigned short *)DMA2_3_CONFIG |
| 567 | #define pDMA2_3_NEXT_DESC_PTR (volatile void **)DMA2_3_NEXT_DESC_PTR |
| 568 | #define pDMA2_3_START_ADDR (volatile void **)DMA2_3_START_ADDR |
| 569 | #define pDMA2_3_X_COUNT (volatile unsigned short *)DMA2_3_X_COUNT |
| 570 | #define pDMA2_3_Y_COUNT (volatile unsigned short *)DMA2_3_Y_COUNT |
| 571 | #define pDMA2_3_X_MODIFY (volatile signed short *)DMA2_3_X_MODIFY |
| 572 | #define pDMA2_3_Y_MODIFY (volatile signed short *)DMA2_3_Y_MODIFY |
| 573 | #define pDMA2_3_CURR_DESC_PTR (volatile void **)DMA2_3_CURR_DESC_PTR |
| 574 | #define pDMA2_3_CURR_ADDR (volatile void **)DMA2_3_CURR_ADDR |
| 575 | #define pDMA2_3_CURR_X_COUNT (volatile unsigned short *)DMA2_3_CURR_X_COUNT |
| 576 | #define pDMA2_3_CURR_Y_COUNT (volatile unsigned short *)DMA2_3_CURR_Y_COUNT |
| 577 | #define pDMA2_3_IRQ_STATUS (volatile unsigned short *)DMA2_3_IRQ_STATUS |
| 578 | #define pDMA2_3_PERIPHERAL_MAP (volatile unsigned short *)DMA2_3_PERIPHERAL_MAP |
| 579 | #define pDMA2_4_CONFIG (volatile unsigned short *)DMA2_4_CONFIG |
| 580 | #define pDMA2_4_NEXT_DESC_PTR (volatile void **)DMA2_4_NEXT_DESC_PTR |
| 581 | #define pDMA2_4_START_ADDR (volatile void **)DMA2_4_START_ADDR |
| 582 | #define pDMA2_4_X_COUNT (volatile unsigned short *)DMA2_4_X_COUNT |
| 583 | #define pDMA2_4_Y_COUNT (volatile unsigned short *)DMA2_4_Y_COUNT |
| 584 | #define pDMA2_4_X_MODIFY (volatile signed short *)DMA2_4_X_MODIFY |
| 585 | #define pDMA2_4_Y_MODIFY (volatile signed short *)DMA2_4_Y_MODIFY |
| 586 | #define pDMA2_4_CURR_DESC_PTR (volatile void **)DMA2_4_CURR_DESC_PTR |
| 587 | #define pDMA2_4_CURR_ADDR (volatile void **)DMA2_4_CURR_ADDR |
| 588 | #define pDMA2_4_CURR_X_COUNT (volatile unsigned short *)DMA2_4_CURR_X_COUNT |
| 589 | #define pDMA2_4_CURR_Y_COUNT (volatile unsigned short *)DMA2_4_CURR_Y_COUNT |
| 590 | #define pDMA2_4_IRQ_STATUS (volatile unsigned short *)DMA2_4_IRQ_STATUS |
| 591 | #define pDMA2_4_PERIPHERAL_MAP (volatile unsigned short *)DMA2_4_PERIPHERAL_MAP |
| 592 | #define pDMA2_5_CONFIG (volatile unsigned short *)DMA2_5_CONFIG |
| 593 | #define pDMA2_5_NEXT_DESC_PTR (volatile void **)DMA2_5_NEXT_DESC_PTR |
| 594 | #define pDMA2_5_START_ADDR (volatile void **)DMA2_5_START_ADDR |
| 595 | #define pDMA2_5_X_COUNT (volatile unsigned short *)DMA2_5_X_COUNT |
| 596 | #define pDMA2_5_Y_COUNT (volatile unsigned short *)DMA2_5_Y_COUNT |
| 597 | #define pDMA2_5_X_MODIFY (volatile signed short *)DMA2_5_X_MODIFY |
| 598 | #define pDMA2_5_Y_MODIFY (volatile signed short *)DMA2_5_Y_MODIFY |
| 599 | #define pDMA2_5_CURR_DESC_PTR (volatile void **)DMA2_5_CURR_DESC_PTR |
| 600 | #define pDMA2_5_CURR_ADDR (volatile void **)DMA2_5_CURR_ADDR |
| 601 | #define pDMA2_5_CURR_X_COUNT (volatile unsigned short *)DMA2_5_CURR_X_COUNT |
| 602 | #define pDMA2_5_CURR_Y_COUNT (volatile unsigned short *)DMA2_5_CURR_Y_COUNT |
| 603 | #define pDMA2_5_IRQ_STATUS (volatile unsigned short *)DMA2_5_IRQ_STATUS |
| 604 | #define pDMA2_5_PERIPHERAL_MAP (volatile unsigned short *)DMA2_5_PERIPHERAL_MAP |
| 605 | #define pDMA2_6_CONFIG (volatile unsigned short *)DMA2_6_CONFIG |
| 606 | #define pDMA2_6_NEXT_DESC_PTR (volatile void **)DMA2_6_NEXT_DESC_PTR |
| 607 | #define pDMA2_6_START_ADDR (volatile void **)DMA2_6_START_ADDR |
| 608 | #define pDMA2_6_X_COUNT (volatile unsigned short *)DMA2_6_X_COUNT |
| 609 | #define pDMA2_6_Y_COUNT (volatile unsigned short *)DMA2_6_Y_COUNT |
| 610 | #define pDMA2_6_X_MODIFY (volatile signed short *)DMA2_6_X_MODIFY |
| 611 | #define pDMA2_6_Y_MODIFY (volatile signed short *)DMA2_6_Y_MODIFY |
| 612 | #define pDMA2_6_CURR_DESC_PTR (volatile void **)DMA2_6_CURR_DESC_PTR |
| 613 | #define pDMA2_6_CURR_ADDR (volatile void **)DMA2_6_CURR_ADDR |
| 614 | #define pDMA2_6_CURR_X_COUNT (volatile unsigned short *)DMA2_6_CURR_X_COUNT |
| 615 | #define pDMA2_6_CURR_Y_COUNT (volatile unsigned short *)DMA2_6_CURR_Y_COUNT |
| 616 | #define pDMA2_6_IRQ_STATUS (volatile unsigned short *)DMA2_6_IRQ_STATUS |
| 617 | #define pDMA2_6_PERIPHERAL_MAP (volatile unsigned short *)DMA2_6_PERIPHERAL_MAP |
| 618 | #define pDMA2_7_CONFIG (volatile unsigned short *)DMA2_7_CONFIG |
| 619 | #define pDMA2_7_NEXT_DESC_PTR (volatile void **)DMA2_7_NEXT_DESC_PTR |
| 620 | #define pDMA2_7_START_ADDR (volatile void **)DMA2_7_START_ADDR |
| 621 | #define pDMA2_7_X_COUNT (volatile unsigned short *)DMA2_7_X_COUNT |
| 622 | #define pDMA2_7_Y_COUNT (volatile unsigned short *)DMA2_7_Y_COUNT |
| 623 | #define pDMA2_7_X_MODIFY (volatile signed short *)DMA2_7_X_MODIFY |
| 624 | #define pDMA2_7_Y_MODIFY (volatile signed short *)DMA2_7_Y_MODIFY |
| 625 | #define pDMA2_7_CURR_DESC_PTR (volatile void **)DMA2_7_CURR_DESC_PTR |
| 626 | #define pDMA2_7_CURR_ADDR (volatile void **)DMA2_7_CURR_ADDR |
| 627 | #define pDMA2_7_CURR_X_COUNT (volatile unsigned short *)DMA2_7_CURR_X_COUNT |
| 628 | #define pDMA2_7_CURR_Y_COUNT (volatile unsigned short *)DMA2_7_CURR_Y_COUNT |
| 629 | #define pDMA2_7_IRQ_STATUS (volatile unsigned short *)DMA2_7_IRQ_STATUS |
| 630 | #define pDMA2_7_PERIPHERAL_MAP (volatile unsigned short *)DMA2_7_PERIPHERAL_MAP |
| 631 | #define pDMA2_8_CONFIG (volatile unsigned short *)DMA2_8_CONFIG |
| 632 | #define pDMA2_8_NEXT_DESC_PTR (volatile void **)DMA2_8_NEXT_DESC_PTR |
| 633 | #define pDMA2_8_START_ADDR (volatile void **)DMA2_8_START_ADDR |
| 634 | #define pDMA2_8_X_COUNT (volatile unsigned short *)DMA2_8_X_COUNT |
| 635 | #define pDMA2_8_Y_COUNT (volatile unsigned short *)DMA2_8_Y_COUNT |
| 636 | #define pDMA2_8_X_MODIFY (volatile signed short *)DMA2_8_X_MODIFY |
| 637 | #define pDMA2_8_Y_MODIFY (volatile signed short *)DMA2_8_Y_MODIFY |
| 638 | #define pDMA2_8_CURR_DESC_PTR (volatile void **)DMA2_8_CURR_DESC_PTR |
| 639 | #define pDMA2_8_CURR_ADDR (volatile void **)DMA2_8_CURR_ADDR |
| 640 | #define pDMA2_8_CURR_X_COUNT (volatile unsigned short *)DMA2_8_CURR_X_COUNT |
| 641 | #define pDMA2_8_CURR_Y_COUNT (volatile unsigned short *)DMA2_8_CURR_Y_COUNT |
| 642 | #define pDMA2_8_IRQ_STATUS (volatile unsigned short *)DMA2_8_IRQ_STATUS |
| 643 | #define pDMA2_8_PERIPHERAL_MAP (volatile unsigned short *)DMA2_8_PERIPHERAL_MAP |
| 644 | #define pDMA2_9_CONFIG (volatile unsigned short *)DMA2_9_CONFIG |
| 645 | #define pDMA2_9_NEXT_DESC_PTR (volatile void **)DMA2_9_NEXT_DESC_PTR |
| 646 | #define pDMA2_9_START_ADDR (volatile void **)DMA2_9_START_ADDR |
| 647 | #define pDMA2_9_X_COUNT (volatile unsigned short *)DMA2_9_X_COUNT |
| 648 | #define pDMA2_9_Y_COUNT (volatile unsigned short *)DMA2_9_Y_COUNT |
| 649 | #define pDMA2_9_X_MODIFY (volatile signed short *)DMA2_9_X_MODIFY |
| 650 | #define pDMA2_9_Y_MODIFY (volatile signed short *)DMA2_9_Y_MODIFY |
| 651 | #define pDMA2_9_CURR_DESC_PTR (volatile void **)DMA2_9_CURR_DESC_PTR |
| 652 | #define pDMA2_9_CURR_ADDR (volatile void **)DMA2_9_CURR_ADDR |
| 653 | #define pDMA2_9_CURR_X_COUNT (volatile unsigned short *)DMA2_9_CURR_X_COUNT |
| 654 | #define pDMA2_9_CURR_Y_COUNT (volatile unsigned short *)DMA2_9_CURR_Y_COUNT |
| 655 | #define pDMA2_9_IRQ_STATUS (volatile unsigned short *)DMA2_9_IRQ_STATUS |
| 656 | #define pDMA2_9_PERIPHERAL_MAP (volatile unsigned short *)DMA2_9_PERIPHERAL_MAP |
| 657 | #define pDMA2_10_CONFIG (volatile unsigned short *)DMA2_10_CONFIG |
| 658 | #define pDMA2_10_NEXT_DESC_PTR (volatile void **)DMA2_10_NEXT_DESC_PTR |
| 659 | #define pDMA2_10_START_ADDR (volatile void **)DMA2_10_START_ADDR |
| 660 | #define pDMA2_10_X_COUNT (volatile unsigned short *)DMA2_10_X_COUNT |
| 661 | #define pDMA2_10_Y_COUNT (volatile unsigned short *)DMA2_10_Y_COUNT |
| 662 | #define pDMA2_10_X_MODIFY (volatile signed short *)DMA2_10_X_MODIFY |
| 663 | #define pDMA2_10_Y_MODIFY (volatile signed short *)DMA2_10_Y_MODIFY |
| 664 | #define pDMA2_10_CURR_DESC_PTR (volatile void **)DMA2_10_CURR_DESC_PTR |
| 665 | #define pDMA2_10_CURR_ADDR (volatile void **)DMA2_10_CURR_ADDR |
| 666 | #define pDMA2_10_CURR_X_COUNT (volatile unsigned short *)DMA2_10_CURR_X_COUNT |
| 667 | #define pDMA2_10_CURR_Y_COUNT (volatile unsigned short *)DMA2_10_CURR_Y_COUNT |
| 668 | #define pDMA2_10_IRQ_STATUS (volatile unsigned short *)DMA2_10_IRQ_STATUS |
| 669 | #define pDMA2_10_PERIPHERAL_MAP (volatile unsigned short *)DMA2_10_PERIPHERAL_MAP |
| 670 | #define pDMA2_11_CONFIG (volatile unsigned short *)DMA2_11_CONFIG |
| 671 | #define pDMA2_11_NEXT_DESC_PTR (volatile void **)DMA2_11_NEXT_DESC_PTR |
| 672 | #define pDMA2_11_START_ADDR (volatile void **)DMA2_11_START_ADDR |
| 673 | #define pDMA2_11_X_COUNT (volatile unsigned short *)DMA2_11_X_COUNT |
| 674 | #define pDMA2_11_Y_COUNT (volatile unsigned short *)DMA2_11_Y_COUNT |
| 675 | #define pDMA2_11_X_MODIFY (volatile signed short *)DMA2_11_X_MODIFY |
| 676 | #define pDMA2_11_Y_MODIFY (volatile signed short *)DMA2_11_Y_MODIFY |
| 677 | #define pDMA2_11_CURR_DESC_PTR (volatile void **)DMA2_11_CURR_DESC_PTR |
| 678 | #define pDMA2_11_CURR_ADDR (volatile void **)DMA2_11_CURR_ADDR |
| 679 | #define pDMA2_11_CURR_X_COUNT (volatile unsigned short *)DMA2_11_CURR_X_COUNT |
| 680 | #define pDMA2_11_CURR_Y_COUNT (volatile unsigned short *)DMA2_11_CURR_Y_COUNT |
| 681 | #define pDMA2_11_IRQ_STATUS (volatile unsigned short *)DMA2_11_IRQ_STATUS |
| 682 | #define pDMA2_11_PERIPHERAL_MAP (volatile unsigned short *)DMA2_11_PERIPHERAL_MAP |
| 683 | |
| 684 | /* Memory DMA2 Controller registers (0xFFC0 0E80-0xFFC0 0FFF) */ |
| 685 | #define pMDMA2_D0_CONFIG (volatile unsigned short *)MDMA2_D0_CONFIG |
| 686 | #define pMDMA2_D0_NEXT_DESC_PTR (volatile void **)MDMA2_D0_NEXT_DESC_PTR |
| 687 | #define pMDMA2_D0_START_ADDR (volatile void **)MDMA2_D0_START_ADDR |
| 688 | #define pMDMA2_D0_X_COUNT (volatile unsigned short *)MDMA2_D0_X_COUNT |
| 689 | #define pMDMA2_D0_Y_COUNT (volatile unsigned short *)MDMA2_D0_Y_COUNT |
| 690 | #define pMDMA2_D0_X_MODIFY (volatile signed short *)MDMA2_D0_X_MODIFY |
| 691 | #define pMDMA2_D0_Y_MODIFY (volatile signed short *)MDMA2_D0_Y_MODIFY |
| 692 | #define pMDMA2_D0_CURR_DESC_PTR (volatile void **)MDMA2_D0_CURR_DESC_PTR |
| 693 | #define pMDMA2_D0_CURR_ADDR (volatile void **)MDMA2_D0_CURR_ADDR |
| 694 | #define pMDMA2_D0_CURR_X_COUNT (volatile unsigned short *)MDMA2_D0_CURR_X_COUNT |
| 695 | #define pMDMA2_D0_CURR_Y_COUNT (volatile unsigned short *)MDMA2_D0_CURR_Y_COUNT |
| 696 | #define pMDMA2_D0_IRQ_STATUS (volatile unsigned short *)MDMA2_D0_IRQ_STATUS |
| 697 | #define pMDMA2_D0_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_D0_PERIPHERAL_MAP |
| 698 | #define pMDMA2_S0_CONFIG (volatile unsigned short *)MDMA2_S0_CONFIG |
| 699 | #define pMDMA2_S0_NEXT_DESC_PTR (volatile void **)MDMA2_S0_NEXT_DESC_PTR |
| 700 | #define pMDMA2_S0_START_ADDR (volatile void **)MDMA2_S0_START_ADDR |
| 701 | #define pMDMA2_S0_X_COUNT (volatile unsigned short *)MDMA2_S0_X_COUNT |
| 702 | #define pMDMA2_S0_Y_COUNT (volatile unsigned short *)MDMA2_S0_Y_COUNT |
| 703 | #define pMDMA2_S0_X_MODIFY (volatile signed short *)MDMA2_S0_X_MODIFY |
| 704 | #define pMDMA2_S0_Y_MODIFY (volatile signed short *)MDMA2_S0_Y_MODIFY |
| 705 | #define pMDMA2_S0_CURR_DESC_PTR (volatile void **)MDMA2_S0_CURR_DESC_PTR |
| 706 | #define pMDMA2_S0_CURR_ADDR (volatile void **)MDMA2_S0_CURR_ADDR |
| 707 | #define pMDMA2_S0_CURR_X_COUNT (volatile unsigned short *)MDMA2_S0_CURR_X_COUNT |
| 708 | #define pMDMA2_S0_CURR_Y_COUNT (volatile unsigned short *)MDMA2_S0_CURR_Y_COUNT |
| 709 | #define pMDMA2_S0_IRQ_STATUS (volatile unsigned short *)MDMA2_S0_IRQ_STATUS |
| 710 | #define pMDMA2_S0_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_S0_PERIPHERAL_MAP |
| 711 | #define pMDMA2_D1_CONFIG (volatile unsigned short *)MDMA2_D1_CONFIG |
| 712 | #define pMDMA2_D1_NEXT_DESC_PTR (volatile void **)MDMA2_D1_NEXT_DESC_PTR |
| 713 | #define pMDMA2_D1_START_ADDR (volatile void **)MDMA2_D1_START_ADDR |
| 714 | #define pMDMA2_D1_X_COUNT (volatile unsigned short *)MDMA2_D1_X_COUNT |
| 715 | #define pMDMA2_D1_Y_COUNT (volatile unsigned short *)MDMA2_D1_Y_COUNT |
| 716 | #define pMDMA2_D1_X_MODIFY (volatile signed short *)MDMA2_D1_X_MODIFY |
| 717 | #define pMDMA2_D1_Y_MODIFY (volatile signed short *)MDMA2_D1_Y_MODIFY |
| 718 | #define pMDMA2_D1_CURR_DESC_PTR (volatile void **)MDMA2_D1_CURR_DESC_PTR |
| 719 | #define pMDMA2_D1_CURR_ADDR (volatile void **)MDMA2_D1_CURR_ADDR |
| 720 | #define pMDMA2_D1_CURR_X_COUNT (volatile unsigned short *)MDMA2_D1_CURR_X_COUNT |
| 721 | #define pMDMA2_D1_CURR_Y_COUNT (volatile unsigned short *)MDMA2_D1_CURR_Y_COUNT |
| 722 | #define pMDMA2_D1_IRQ_STATUS (volatile unsigned short *)MDMA2_D1_IRQ_STATUS |
| 723 | #define pMDMA2_D1_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_D1_PERIPHERAL_MAP |
| 724 | #define pMDMA2_S1_CONFIG (volatile unsigned short *)MDMA2_S1_CONFIG |
| 725 | #define pMDMA2_S1_NEXT_DESC_PTR (volatile void **)MDMA2_S1_NEXT_DESC_PTR |
| 726 | #define pMDMA2_S1_START_ADDR (volatile void **)MDMA2_S1_START_ADDR |
| 727 | #define pMDMA2_S1_X_COUNT (volatile unsigned short *)MDMA2_S1_X_COUNT |
| 728 | #define pMDMA2_S1_Y_COUNT (volatile unsigned short *)MDMA2_S1_Y_COUNT |
| 729 | #define pMDMA2_S1_X_MODIFY (volatile signed short *)MDMA2_S1_X_MODIFY |
| 730 | #define pMDMA2_S1_Y_MODIFY (volatile signed short *)MDMA2_S1_Y_MODIFY |
| 731 | #define pMDMA2_S1_CURR_DESC_PTR (volatile void **)MDMA2_S1_CURR_DESC_PTR |
| 732 | #define pMDMA2_S1_CURR_ADDR (volatile void **)MDMA2_S1_CURR_ADDR |
| 733 | #define pMDMA2_S1_CURR_X_COUNT (volatile unsigned short *)MDMA2_S1_CURR_X_COUNT |
| 734 | #define pMDMA2_S1_CURR_Y_COUNT (volatile unsigned short *)MDMA2_S1_CURR_Y_COUNT |
| 735 | #define pMDMA2_S1_IRQ_STATUS (volatile unsigned short *)MDMA2_S1_IRQ_STATUS |
| 736 | #define pMDMA2_S1_PERIPHERAL_MAP (volatile unsigned short *)MDMA2_S1_PERIPHERAL_MAP |
| 737 | |
| 738 | /* Internal Memory DMA Registers (0xFFC0_1800 - 0xFFC0_19FF) */ |
| 739 | #define pIMDMA_D0_CONFIG (volatile unsigned short *)IMDMA_D0_CONFIG |
| 740 | #define pIMDMA_D0_NEXT_DESC_PTR (volatile void **)IMDMA_D0_NEXT_DESC_PTR |
| 741 | #define pIMDMA_D0_START_ADDR (volatile void **)IMDMA_D0_START_ADDR |
| 742 | #define pIMDMA_D0_X_COUNT (volatile unsigned short *)IMDMA_D0_X_COUNT |
| 743 | #define pIMDMA_D0_Y_COUNT (volatile unsigned short *)IMDMA_D0_Y_COUNT |
| 744 | #define pIMDMA_D0_X_MODIFY (volatile signed short *)IMDMA_D0_X_MODIFY |
| 745 | #define pIMDMA_D0_Y_MODIFY (volatile signed short *)IMDMA_D0_Y_MODIFY |
| 746 | #define pIMDMA_D0_CURR_DESC_PTR (volatile void **)IMDMA_D0_CURR_DESC_PTR |
| 747 | #define pIMDMA_D0_CURR_ADDR (volatile void **)IMDMA_D0_CURR_ADDR |
| 748 | #define pIMDMA_D0_CURR_X_COUNT (volatile unsigned short *)IMDMA_D0_CURR_X_COUNT |
| 749 | #define pIMDMA_D0_CURR_Y_COUNT (volatile unsigned short *)IMDMA_D0_CURR_Y_COUNT |
| 750 | #define pIMDMA_D0_IRQ_STATUS (volatile unsigned short *)IMDMA_D0_IRQ_STATUS |
| 751 | #define pIMDMA_S0_CONFIG (volatile unsigned short *)IMDMA_S0_CONFIG |
| 752 | #define pIMDMA_S0_NEXT_DESC_PTR (volatile void **)IMDMA_S0_NEXT_DESC_PTR |
| 753 | #define pIMDMA_S0_START_ADDR (volatile void **)IMDMA_S0_START_ADDR |
| 754 | #define pIMDMA_S0_X_COUNT (volatile unsigned short *)IMDMA_S0_X_COUNT |
| 755 | #define pIMDMA_S0_Y_COUNT (volatile unsigned short *)IMDMA_S0_Y_COUNT |
| 756 | #define pIMDMA_S0_X_MODIFY (volatile signed short *)IMDMA_S0_X_MODIFY |
| 757 | #define pIMDMA_S0_Y_MODIFY (volatile signed short *)IMDMA_S0_Y_MODIFY |
| 758 | #define pIMDMA_S0_CURR_DESC_PTR (volatile void **)IMDMA_S0_CURR_DESC_PTR |
| 759 | #define pIMDMA_S0_CURR_ADDR (volatile void **)IMDMA_S0_CURR_ADDR |
| 760 | #define pIMDMA_S0_CURR_X_COUNT (volatile unsigned short *)IMDMA_S0_CURR_X_COUNT |
| 761 | #define pIMDMA_S0_CURR_Y_COUNT (volatile unsigned short *)IMDMA_S0_CURR_Y_COUNT |
| 762 | #define pIMDMA_S0_IRQ_STATUS (volatile unsigned short *)IMDMA_S0_IRQ_STATUS |
| 763 | #define pIMDMA_D1_CONFIG (volatile unsigned short *)IMDMA_D1_CONFIG |
| 764 | #define pIMDMA_D1_NEXT_DESC_PTR (volatile void **)IMDMA_D1_NEXT_DESC_PTR |
| 765 | #define pIMDMA_D1_START_ADDR (volatile void **)IMDMA_D1_START_ADDR |
| 766 | #define pIMDMA_D1_X_COUNT (volatile unsigned short *)IMDMA_D1_X_COUNT |
| 767 | #define pIMDMA_D1_Y_COUNT (volatile unsigned short *)IMDMA_D1_Y_COUNT |
| 768 | #define pIMDMA_D1_X_MODIFY (volatile signed short *)IMDMA_D1_X_MODIFY |
| 769 | #define pIMDMA_D1_Y_MODIFY (volatile signed short *)IMDMA_D1_Y_MODIFY |
| 770 | #define pIMDMA_D1_CURR_DESC_PTR (volatile void **)IMDMA_D1_CURR_DESC_PTR |
| 771 | #define pIMDMA_D1_CURR_ADDR (volatile void **)IMDMA_D1_CURR_ADDR |
| 772 | #define pIMDMA_D1_CURR_X_COUNT (volatile unsigned short *)IMDMA_D1_CURR_X_COUNT |
| 773 | #define pIMDMA_D1_CURR_Y_COUNT (volatile unsigned short *)IMDMA_D1_CURR_Y_COUNT |
| 774 | #define pIMDMA_D1_IRQ_STATUS (volatile unsigned short *)IMDMA_D1_IRQ_STATUS |
| 775 | #define pIMDMA_S1_CONFIG (volatile unsigned short *)IMDMA_S1_CONFIG |
| 776 | #define pIMDMA_S1_NEXT_DESC_PTR (volatile void **)IMDMA_S1_NEXT_DESC_PTR |
| 777 | #define pIMDMA_S1_START_ADDR (volatile void **)IMDMA_S1_START_ADDR |
| 778 | #define pIMDMA_S1_X_COUNT (volatile unsigned short *)IMDMA_S1_X_COUNT |
| 779 | #define pIMDMA_S1_Y_COUNT (volatile unsigned short *)IMDMA_S1_Y_COUNT |
| 780 | #define pIMDMA_S1_X_MODIFY (volatile signed short *)IMDMA_S1_X_MODIFY |
| 781 | #define pIMDMA_S1_Y_MODIFY (volatile signed short *)IMDMA_S1_Y_MODIFY |
| 782 | #define pIMDMA_S1_CURR_DESC_PTR (volatile void **)IMDMA_S1_CURR_DESC_PTR |
| 783 | #define pIMDMA_S1_CURR_ADDR (volatile void **)IMDMA_S1_CURR_ADDR |
| 784 | #define pIMDMA_S1_CURR_X_COUNT (volatile unsigned short *)IMDMA_S1_CURR_X_COUNT |
| 785 | #define pIMDMA_S1_CURR_Y_COUNT (volatile unsigned short *)IMDMA_S1_CURR_Y_COUNT |
| 786 | #define pIMDMA_S1_IRQ_STATUS (volatile unsigned short *)IMDMA_S1_IRQ_STATUS |
| 787 | |
| 788 | /* |
| 789 | * System Reset and Interrupt Controller registers for |
| 790 | * core A (0xFFC0 0100-0xFFC0 01FF) |
| 791 | */ |
| 792 | #define pSWRST (volatile unsigned short *)SICA_SWRST |
| 793 | #define pSYSCR (volatile unsigned short *)SICA_SYSCR |
| 794 | #define pRVECT (volatile unsigned short *)SICA_RVECT |
| 795 | #define pSIC_SWRST (volatile unsigned short *)SICA_SWRST |
| 796 | #define pSIC_SYSCR (volatile unsigned short *)SICA_SYSCR |
| 797 | #define pSIC_RVECT (volatile unsigned short *)SICA_RVECT |
| 798 | #define pSIC_IMASK (volatile unsigned long *)SICA_IMASK |
| 799 | #define pSIC_IAR0 ((volatile unsigned long *)SICA_IAR0) |
| 800 | #define pSIC_IAR1 (volatile unsigned long *)SICA_IAR1 |
| 801 | #define pSIC_IAR2 (volatile unsigned long *)SICA_IAR2 |
| 802 | #define pSIC_ISR (volatile unsigned long *)SICA_ISR0 |
| 803 | #define pSIC_IWR (volatile unsigned long *)SICA_IWR0 |
| 804 | |
| 805 | /* Watchdog Timer registers for Core A (0xFFC0 0200-0xFFC0 02FF) */ |
| 806 | #define pWDOG_CTL (volatile unsigned short *)WDOGA_CTL |
| 807 | #define pWDOG_CNT (volatile unsigned long *)WDOGA_CNT |
| 808 | #define pWDOG_STAT (volatile unsigned long *)WDOGA_STAT |
| 809 | |
| 810 | /* Programmable Flag 0 registers (0xFFC0 0700-0xFFC0 07FF) */ |
| 811 | #define pFIO_FLAG_D (volatile unsigned short *)FIO0_FLAG_D |
| 812 | #define pFIO_FLAG_C (volatile unsigned short *)FIO0_FLAG_C |
| 813 | #define pFIO_FLAG_S (volatile unsigned short *)FIO0_FLAG_S |
| 814 | #define pFIO_FLAG_T (volatile unsigned short *)FIO0_FLAG_T |
| 815 | #define pFIO_MASKA_D (volatile unsigned short *)FIO0_MASKA_D |
| 816 | #define pFIO_MASKA_C (volatile unsigned short *)FIO0_MASKA_C |
| 817 | #define pFIO_MASKA_S (volatile unsigned short *)FIO0_MASKA_S |
| 818 | #define pFIO_MASKA_T (volatile unsigned short *)FIO0_MASKA_T |
| 819 | #define pFIO_MASKB_D (volatile unsigned short *)FIO0_MASKB_D |
| 820 | #define pFIO_MASKB_C (volatile unsigned short *)FIO0_MASKB_C |
| 821 | #define pFIO_MASKB_S (volatile unsigned short *)FIO0_MASKB_S |
| 822 | #define pFIO_MASKB_T (volatile unsigned short *)FIO0_MASKB_T |
| 823 | #define pFIO_DIR (volatile unsigned short *)FIO0_DIR |
| 824 | #define pFIO_POLAR (volatile unsigned short *)FIO0_POLAR |
| 825 | #define pFIO_EDGE (volatile unsigned short *)FIO0_EDGE |
| 826 | #define pFIO_BOTH (volatile unsigned short *)FIO0_BOTH |
| 827 | #define pFIO_INEN (volatile unsigned short *)FIO0_INEN |
| 828 | |
| 829 | /* Parallel Peripheral Interface (PPI) 0 registers (0xFFC0 1000-0xFFC0 10FF)*/ |
| 830 | #define pPPI_CONTROL (volatile unsigned short *)PPI0_CONTROL |
| 831 | #define pPPI_STATUS (volatile unsigned short *)PPI0_STATUS |
| 832 | #define pPPI_COUNT (volatile unsigned short *)PPI0_COUNT |
| 833 | #define pPPI_DELAY (volatile unsigned short *)PPI0_DELAY |
| 834 | #define pPPI_FRAME (volatile unsigned short *)PPI0_FRAME |
| 835 | |
| 836 | /* DMA1 Controller registers (0xFFC0 1C00-0xFFC0 1FFF) */ |
| 837 | #define pDMA0_CONFIG (volatile unsigned short *)DMA1_0_CONFIG |
| 838 | #define pDMA0_NEXT_DESC_PTR (volatile void **)DMA1_0_NEXT_DESC_PTR |
| 839 | #define pDMA0_START_ADDR (volatile void **)DMA1_0_START_ADDR |
| 840 | #define pDMA0_X_COUNT (volatile unsigned short *)DMA1_0_X_COUNT |
| 841 | #define pDMA0_Y_COUNT (volatile unsigned short *)DMA1_0_Y_COUNT |
| 842 | #define pDMA0_X_MODIFY (volatile unsigned short *)DMA1_0_X_MODIFY |
| 843 | #define pDMA0_Y_MODIFY (volatile unsigned short *)DMA1_0_Y_MODIFY |
| 844 | #define pDMA0_CURR_DESC_PTR (volatile void **)DMA1_0_CURR_DESC_PTR |
| 845 | #define pDMA0_CURR_ADDR (volatile void **)DMA1_0_CURR_ADDR |
| 846 | #define pDMA0_CURR_X_COUNT (volatile unsigned short *)DMA1_0_CURR_X_COUNT |
| 847 | #define pDMA0_CURR_Y_COUNT (volatile unsigned short *)DMA1_0_CURR_Y_COUNT |
| 848 | #define pDMA0_IRQ_STATUS (volatile unsigned short *)DMA1_0_IRQ_STATUS |
| 849 | #define pDMA0_PERIPHERAL_MAP (volatile unsigned short *)DMA1_0_PERIPHERAL_MAP |
| 850 | |
| 851 | /* Memory DMA1 Controller registers (0xFFC0 1E80-0xFFC0 1FFF) */ |
| 852 | #define pMDMA_D0_CONFIG (volatile unsigned short *)MDMA1_D0_CONFIG |
| 853 | #define pMDMA_D0_NEXT_DESC_PTR (volatile void **)MDMA1_D0_NEXT_DESC_PTR |
| 854 | #define pMDMA_D0_START_ADDR (volatile void **)MDMA1_D0_START_ADDR |
| 855 | #define pMDMA_D0_X_COUNT (volatile unsigned short *)MDMA1_D0_X_COUNT |
| 856 | #define pMDMA_D0_Y_COUNT (volatile unsigned short *)MDMA1_D0_Y_COUNT |
| 857 | #define pMDMA_D0_X_MODIFY (volatile unsigned short *)MDMA1_D0_X_MODIFY |
| 858 | #define pMDMA_D0_Y_MODIFY (volatile unsigned short *)MDMA1_D0_Y_MODIFY |
| 859 | #define pMDMA_D0_CURR_DESC_PTR (volatile void **)MDMA1_D0_CURR_DESC_PTR |
| 860 | #define pMDMA_D0_CURR_ADDR (volatile void **)MDMA1_D0_CURR_ADDR |
| 861 | #define pMDMA_D0_CURR_X_COUNT (volatile unsigned short *)MDMA1_D0_CURR_X_COUNT |
| 862 | #define pMDMA_D0_CURR_Y_COUNT (volatile unsigned short *)MDMA1_D0_CURR_Y_COUNT |
| 863 | #define pMDMA_D0_IRQ_STATUS (volatile unsigned short *)MDMA1_D0_IRQ_STATUS |
| 864 | #define pMDMA_D0_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_D0_PERIPHERAL_MAP |
| 865 | #define pMDMA_S0_CONFIG (volatile unsigned short *)MDMA1_S0_CONFIG |
| 866 | #define pMDMA_S0_NEXT_DESC_PTR (volatile void **)MDMA1_S0_NEXT_DESC_PTR |
| 867 | #define pMDMA_S0_START_ADDR (volatile void **)MDMA1_S0_START_ADDR |
| 868 | #define pMDMA_S0_X_COUNT (volatile unsigned short *)MDMA1_S0_X_COUNT |
| 869 | #define pMDMA_S0_Y_COUNT (volatile unsigned short *)MDMA1_S0_Y_COUNT |
| 870 | #define pMDMA_S0_X_MODIFY (volatile unsigned short *)MDMA1_S0_X_MODIFY |
| 871 | #define pMDMA_S0_Y_MODIFY (volatile unsigned short *)MDMA1_S0_Y_MODIFY |
| 872 | #define pMDMA_S0_CURR_DESC_PTR (volatile void **)MDMA1_S0_CURR_DESC_PTR |
| 873 | #define pMDMA_S0_CURR_ADDR (volatile void **)MDMA1_S0_CURR_ADDR |
| 874 | #define pMDMA_S0_CURR_X_COUNT (volatile unsigned short *)MDMA1_S0_CURR_X_COUNT |
| 875 | #define pMDMA_S0_CURR_Y_COUNT (volatile unsigned short *)MDMA1_S0_CURR_Y_COUNT |
| 876 | #define pMDMA_S0_IRQ_STATUS (volatile unsigned short *)MDMA1_S0_IRQ_STATUS |
| 877 | #define pMDMA_S0_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_S0_PERIPHERAL_MAP |
| 878 | #define pMDMA_D1_CONFIG (volatile unsigned short *)MDMA1_D1_CONFIG |
| 879 | #define pMDMA_D1_NEXT_DESC_PTR (volatile void **)MDMA1_D1_NEXT_DESC_PTR |
| 880 | #define pMDMA_D1_START_ADDR (volatile void **)MDMA1_D1_START_ADDR |
| 881 | #define pMDMA_D1_X_COUNT (volatile unsigned short *)MDMA1_D1_X_COUNT |
| 882 | #define pMDMA_D1_Y_COUNT (volatile unsigned short *)MDMA1_D1_Y_COUNT |
| 883 | #define pMDMA_D1_X_MODIFY (volatile unsigned short *)MDMA1_D1_X_MODIFY |
| 884 | #define pMDMA_D1_Y_MODIFY (volatile unsigned short *)MDMA1_D1_Y_MODIFY |
| 885 | #define pMDMA_D1_CURR_DESC_PTR (volatile void **)MDMA1_D1_CURR_DESC_PTR |
| 886 | #define pMDMA_D1_CURR_ADDR (volatile void **)MDMA1_D1_CURR_ADDR |
| 887 | #define pMDMA_D1_CURR_X_COUNT (volatile unsigned short *)MDMA1_D1_CURR_X_COUNT |
| 888 | #define pMDMA_D1_CURR_Y_COUNT (volatile unsigned short *)MDMA1_D1_CURR_Y_COUNT |
| 889 | #define pMDMA_D1_IRQ_STATUS (volatile unsigned short *)MDMA1_D1_IRQ_STATUS |
| 890 | #define pMDMA_D1_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_D1_PERIPHERAL_MAP |
| 891 | #define pMDMA_S1_CONFIG (volatile unsigned short *)MDMA1_S1_CONFIG |
| 892 | #define pMDMA_S1_NEXT_DESC_PTR (volatile void **)MDMA1_S1_NEXT_DESC_PTR |
| 893 | #define pMDMA_S1_START_ADDR (volatile void **)MDMA1_S1_START_ADDR |
| 894 | #define pMDMA_S1_X_COUNT (volatile unsigned short *)MDMA1_S1_X_COUNT |
| 895 | #define pMDMA_S1_Y_COUNT (volatile unsigned short *)MDMA1_S1_Y_COUNT |
| 896 | #define pMDMA_S1_X_MODIFY (volatile unsigned short *)MDMA1_S1_X_MODIFY |
| 897 | #define pMDMA_S1_Y_MODIFY (volatile unsigned short *)MDMA1_S1_Y_MODIFY |
| 898 | #define pMDMA_S1_CURR_DESC_PTR (volatile void **)MDMA1_S1_CURR_DESC_PTR |
| 899 | #define pMDMA_S1_CURR_ADDR (volatile void **)MDMA1_S1_CURR_ADDR |
| 900 | #define pMDMA_S1_CURR_X_COUNT (volatile unsigned short *)MDMA1_S1_CURR_X_COUNT |
| 901 | #define pMDMA_S1_CURR_Y_COUNT (volatile unsigned short *)MDMA1_S1_CURR_Y_COUNT |
| 902 | #define pMDMA_S1_IRQ_STATUS (volatile unsigned short *)MDMA1_S1_IRQ_STATUS |
| 903 | #define pMDMA_S1_PERIPHERAL_MAP (volatile unsigned short *)MDMA1_S1_PERIPHERAL_MAP |
| 904 | |
| 905 | /* DMA2 Controller registers (0xFFC0 0C00-0xFFC0 0DFF) */ |
| 906 | #define pDMA1_CONFIG (volatile unsigned short *)DMA2_0_CONFIG |
| 907 | #define pDMA1_NEXT_DESC_PTR (volatile void **)DMA2_0_NEXT_DESC_PTR |
| 908 | #define pDMA1_START_ADDR (volatile void **)DMA2_0_START_ADDR |
| 909 | #define pDMA1_X_COUNT (volatile unsigned short *)DMA2_0_X_COUNT |
| 910 | #define pDMA1_Y_COUNT (volatile unsigned short *)DMA2_0_Y_COUNT |
| 911 | #define pDMA1_X_MODIFY (volatile unsigned short *)DMA2_0_X_MODIFY |
| 912 | #define pDMA1_Y_MODIFY (volatile unsigned short *)DMA2_0_Y_MODIFY |
| 913 | #define pDMA1_CURR_DESC_PTR (volatile void **)DMA2_0_CURR_DESC_PTR |
| 914 | #define pDMA1_CURR_ADDR (volatile void **)DMA2_0_CURR_ADDR |
| 915 | #define pDMA1_CURR_X_COUNT (volatile unsigned short *)DMA2_0_CURR_X_COUNT |
| 916 | #define pDMA1_CURR_Y_COUNT (volatile unsigned short *)DMA2_0_CURR_Y_COUNT |
| 917 | #define pDMA1_IRQ_STATUS (volatile unsigned short *)DMA2_0_IRQ_STATUS |
| 918 | #define pDMA1_PERIPHERAL_MAP (volatile unsigned short *)DMA2_0_PERIPHERAL_MAP |
| 919 | #define pDMA2_CONFIG (volatile unsigned short *)DMA2_1_CONFIG |
| 920 | #define pDMA2_NEXT_DESC_PTR (volatile void **)DMA2_1_NEXT_DESC_PTR |
| 921 | #define pDMA2_START_ADDR (volatile void **)DMA2_1_START_ADDR |
| 922 | #define pDMA2_X_COUNT (volatile unsigned short *)DMA2_1_X_COUNT |
| 923 | #define pDMA2_Y_COUNT (volatile unsigned short *)DMA2_1_Y_COUNT |
| 924 | #define pDMA2_X_MODIFY (volatile unsigned short *)DMA2_1_X_MODIFY |
| 925 | #define pDMA2_Y_MODIFY (volatile unsigned short *)DMA2_1_Y_MODIFY |
| 926 | #define pDMA2_CURR_DESC_PTR (volatile void **)DMA2_1_CURR_DESC_PTR |
| 927 | #define pDMA2_CURR_ADDR (volatile void **)DMA2_1_CURR_ADDR |
| 928 | #define pDMA2_CURR_X_COUNT (volatile unsigned short *)DMA2_1_CURR_X_COUNT |
| 929 | #define pDMA2_CURR_Y_COUNT (volatile unsigned short *)DMA2_1_CURR_Y_COUNT |
| 930 | #define pDMA2_IRQ_STATUS (volatile unsigned short *)DMA2_1_IRQ_STATUS |
| 931 | #define pDMA2_PERIPHERAL_MAP (volatile unsigned short *)DMA2_1_PERIPHERAL_MAP |
| 932 | #define pDMA3_CONFIG (volatile unsigned short *)DMA2_2_CONFIG |
| 933 | #define pDMA3_NEXT_DESC_PTR (volatile void **)DMA2_2_NEXT_DESC_PTR |
| 934 | #define pDMA3_START_ADDR (volatile void **)DMA2_2_START_ADDR |
| 935 | #define pDMA3_X_COUNT (volatile unsigned short *)DMA2_2_X_COUNT |
| 936 | #define pDMA3_Y_COUNT (volatile unsigned short *)DMA2_2_Y_COUNT |
| 937 | #define pDMA3_X_MODIFY (volatile unsigned short *)DMA2_2_X_MODIFY |
| 938 | #define pDMA3_Y_MODIFY (volatile unsigned short *)DMA2_2_Y_MODIFY |
| 939 | #define pDMA3_CURR_DESC_PTR (volatile void **)DMA2_2_CURR_DESC_PTR |
| 940 | #define pDMA3_CURR_ADDR (volatile void **)DMA2_2_CURR_ADDR |
| 941 | #define pDMA3_CURR_X_COUNT (volatile unsigned short *)DMA2_2_CURR_X_COUNT |
| 942 | #define pDMA3_CURR_Y_COUNT (volatile unsigned short *)DMA2_2_CURR_Y_COUNT |
| 943 | #define pDMA3_IRQ_STATUS (volatile unsigned short *)DMA2_2_IRQ_STATUS |
| 944 | #define pDMA3_PERIPHERAL_MAP (volatile unsigned short *)DMA2_2_PERIPHERAL_MAP |
| 945 | #define pDMA4_CONFIG (volatile unsigned short *)DMA2_3_CONFIG |
| 946 | #define pDMA4_NEXT_DESC_PTR (volatile void **)DMA2_3_NEXT_DESC_PTR |
| 947 | #define pDMA4_START_ADDR (volatile void **)DMA2_3_START_ADDR |
| 948 | #define pDMA4_X_COUNT (volatile unsigned short *)DMA2_3_X_COUNT |
| 949 | #define pDMA4_Y_COUNT (volatile unsigned short *)DMA2_3_Y_COUNT |
| 950 | #define pDMA4_X_MODIFY (volatile unsigned short *)DMA2_3_X_MODIFY |
| 951 | #define pDMA4_Y_MODIFY (volatile unsigned short *)DMA2_3_Y_MODIFY |
| 952 | #define pDMA4_CURR_DESC_PTR (volatile void **)DMA2_3_CURR_DESC_PTR |
| 953 | #define pDMA4_CURR_ADDR (volatile void **)DMA2_3_CURR_ADDR |
| 954 | #define pDMA4_CURR_X_COUNT (volatile unsigned short *)DMA2_3_CURR_X_COUNT |
| 955 | #define pDMA4_CURR_Y_COUNT (volatile unsigned short *)DMA2_3_CURR_Y_COUNT |
| 956 | #define pDMA4_IRQ_STATUS (volatile unsigned short *)DMA2_3_IRQ_STATUS |
| 957 | #define pDMA4_PERIPHERAL_MAP (volatile unsigned short *)DMA2_3_PERIPHERAL_MAP |
| 958 | #define pDMA5_CONFIG (volatile unsigned short *)DMA2_4_CONFIG |
| 959 | #define pDMA5_NEXT_DESC_PTR (volatile void **)DMA2_4_NEXT_DESC_PTR |
| 960 | #define pDMA5_START_ADDR (volatile void **)DMA2_4_START_ADDR |
| 961 | #define pDMA5_X_COUNT (volatile unsigned short *)DMA2_4_X_COUNT |
| 962 | #define pDMA5_Y_COUNT (volatile unsigned short *)DMA2_4_Y_COUNT |
| 963 | #define pDMA5_X_MODIFY (volatile unsigned short *)DMA2_4_X_MODIFY |
| 964 | #define pDMA5_Y_MODIFY (volatile unsigned short *)DMA2_4_Y_MODIFY |
| 965 | #define pDMA5_CURR_DESC_PTR (volatile void **)DMA2_4_CURR_DESC_PTR |
| 966 | #define pDMA5_CURR_ADDR (volatile void **)DMA2_4_CURR_ADDR |
| 967 | #define pDMA5_CURR_X_COUNT (volatile unsigned short *)DMA2_4_CURR_X_COUNT |
| 968 | #define pDMA5_CURR_Y_COUNT (volatile unsigned short *)DMA2_4_CURR_Y_COUNT |
| 969 | #define pDMA5_IRQ_STATUS (volatile unsigned short *)DMA2_4_IRQ_STATUS |
| 970 | #define pDMA5_PERIPHERAL_MAP (volatile unsigned short *)DMA2_4_PERIPHERAL_MAP |
| 971 | #define pDMA6_CONFIG (volatile unsigned short *)DMA2_5_CONFIG |
| 972 | #define pDMA6_NEXT_DESC_PTR (volatile void **)DMA2_5_NEXT_DESC_PTR |
| 973 | #define pDMA6_START_ADDR (volatile void **)DMA2_5_START_ADDR |
| 974 | #define pDMA6_X_COUNT (volatile unsigned short *)DMA2_5_X_COUNT |
| 975 | #define pDMA6_Y_COUNT (volatile unsigned short *)DMA2_5_Y_COUNT |
| 976 | #define pDMA6_X_MODIFY (volatile unsigned short *)DMA2_5_X_MODIFY |
| 977 | #define pDMA6_Y_MODIFY (volatile unsigned short *)DMA2_5_Y_MODIFY |
| 978 | #define pDMA6_CURR_DESC_PTR (volatile void **)DMA2_5_CURR_DESC_PTR |
| 979 | #define pDMA6_CURR_ADDR (volatile void **)DMA2_5_CURR_ADDR |
| 980 | #define pDMA6_CURR_X_COUNT (volatile unsigned short *)DMA2_5_CURR_X_COUNT |
| 981 | #define pDMA6_CURR_Y_COUNT (volatile unsigned short *)DMA2_5_CURR_Y_COUNT |
| 982 | #define pDMA6_IRQ_STATUS (volatile unsigned short *)DMA2_5_IRQ_STATUS |
| 983 | #define pDMA6_PERIPHERAL_MAP (volatile unsigned short *)DMA2_5_PERIPHERAL_MAP |
| 984 | #define pDMA7_CONFIG (volatile unsigned short *)DMA2_6_CONFIG |
| 985 | #define pDMA7_NEXT_DESC_PTR (volatile void **)DMA2_6_NEXT_DESC_PTR |
| 986 | #define pDMA7_START_ADDR (volatile void **)DMA2_6_START_ADDR |
| 987 | #define pDMA7_X_COUNT (volatile unsigned short *)DMA2_6_X_COUNT |
| 988 | #define pDMA7_Y_COUNT (volatile unsigned short *)DMA2_6_Y_COUNT |
| 989 | #define pDMA7_X_MODIFY (volatile unsigned short *)DMA2_6_X_MODIFY |
| 990 | #define pDMA7_Y_MODIFY (volatile unsigned short *)DMA2_6_Y_MODIFY |
| 991 | #define pDMA7_CURR_DESC_PTR (volatile void **)DMA2_6_CURR_DESC_PTR |
| 992 | #define pDMA7_CURR_ADDR (volatile void **)DMA2_6_CURR_ADDR |
| 993 | #define pDMA7_CURR_X_COUNT (volatile unsigned short *)DMA2_6_CURR_X_COUNT |
| 994 | #define pDMA7_CURR_Y_COUNT (volatile unsigned short *)DMA2_6_CURR_Y_COUNT |
| 995 | #define pDMA7_IRQ_STATUS (volatile unsigned short *)DMA2_6_IRQ_STATUS |
| 996 | #define pDMA7_PERIPHERAL_MAP (volatile unsigned short *)DMA2_6_PERIPHERAL_MAP |
| 997 | |
| 998 | #endif /* _CDEF_BF561_H */ |