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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / d30b2bf3b32ea41a007558559999b7c1b35ed0ce / . / arch / arm / dts / am335x-icev2.dts
blob: 3a1d5a54c5551c1efa1ebf626e4bea01b14a1236 [file] [log] [blame]
Andrew Davisd30b2bf2023-04-11 13:24:54 -0500[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
Lokesh Vutla73ec6962016-05-16 11:47:28 +0530[diff] [blame]2/*
Andrew Davisd30b2bf2023-04-11 13:24:54 -0500[diff] [blame^]3 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
Lokesh Vutla73ec6962016-05-16 11:47:28 +0530[diff] [blame]4 */
5
6/*
7 * AM335x ICE V2 board
8 * http://www.ti.com/tool/tmdsice3359
9 */
10
11/dts-v1/;
12
13#include "am33xx.dtsi"
14
15/ {
16 model = "TI AM3359 ICE-V2";
17 compatible = "ti,am3359-icev2", "ti,am33xx";
18
19 chosen {
20 stdout-path = &uart3;
21 tick-timer = &timer2;
22 };
23
24 memory {
25 device_type = "memory";
26 reg = <0x80000000 0x10000000>; /* 256 MB */
27 };
28
29 vbat: fixedregulator@0 {
30 compatible = "regulator-fixed";
31 regulator-name = "vbat";
32 regulator-min-microvolt = <5000000>;
33 regulator-max-microvolt = <5000000>;
34 regulator-boot-on;
35 };
36
37 vtt_fixed: fixedregulator@1 {
38 compatible = "regulator-fixed";
39 regulator-name = "vtt";
40 regulator-min-microvolt = <1500000>;
41 regulator-max-microvolt = <1500000>;
42 gpio = <&gpio0 18 GPIO_ACTIVE_HIGH>;
43 regulator-always-on;
44 regulator-boot-on;
45 enable-active-high;
46 };
47
48 leds@0 {
49 compatible = "gpio-leds";
50
51 led@0 {
52 label = "out0";
53 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
54 default-state = "off";
55 };
56
57 led@1 {
58 label = "out1";
59 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
60 default-state = "off";
61 };
62
63 led@2 {
64 label = "out2";
65 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
66 default-state = "off";
67 };
68
69 led@3 {
70 label = "out3";
71 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
72 default-state = "off";
73 };
74
75 led@4 {
76 label = "out4";
77 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
78 default-state = "off";
79 };
80
81 led@5 {
82 label = "out5";
83 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
84 default-state = "off";
85 };
86
87 led@6 {
88 label = "out6";
89 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
90 default-state = "off";
91 };
92
93 led@7 {
94 label = "out7";
95 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
96 default-state = "off";
97 };
98 };
99
100 /* Tricolor status LEDs */
101 leds@1 {
102 compatible = "gpio-leds";
103 pinctrl-names = "default";
104 pinctrl-0 = <&user_leds>;
105
106 led@0 {
107 label = "status0:red:cpu0";
108 gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
109 default-state = "off";
110 linux,default-trigger = "cpu0";
111 };
112
113 led@1 {
114 label = "status0:green:usr";
115 gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
116 default-state = "off";
117 };
118
119 led@2 {
120 label = "status0:yellow:usr";
121 gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
122 default-state = "off";
123 };
124
125 led@3 {
126 label = "status1:red:mmc0";
127 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
128 default-state = "off";
129 linux,default-trigger = "mmc0";
130 };
131
132 led@4 {
133 label = "status1:green:usr";
134 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
135 default-state = "off";
136 };
137
138 led@5 {
139 label = "status1:yellow:usr";
140 gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
141 default-state = "off";
142 };
143 };
144};
145
146&am33xx_pinmux {
147 user_leds: user_leds {
148 pinctrl-single,pins = <
149 AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE7) /* (J18) gmii1_txd3.gpio0[16] */
150 AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE7) /* (K15) gmii1_txd2.gpio0[17] */
151 AM33XX_IOPAD(0x9b0, PIN_OUTPUT | MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] */
152 AM33XX_IOPAD(0x9b4, PIN_OUTPUT | MUX_MODE7) /* (D14) xdma_event_intr1.gpio0[20] */
153 AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE7) /* (U9) gpmc_csn1.gpio1[30] */
154 AM33XX_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] */
155 >;
156 };
157
158 mmc0_pins_default: mmc0_pins_default {
159 pinctrl-single,pins = <
160 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* (F17) mmc0_dat3.mmc0_dat3 */
161 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* (F18) mmc0_dat2.mmc0_dat2 */
162 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* (G15) mmc0_dat1.mmc0_dat1 */
163 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* (G16) mmc0_dat0.mmc0_dat0 */
164 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* (G17) mmc0_clk.mmc0_clk */
165 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* (G18) mmc0_cmd.mmc0_cmd */
166 AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* (C15) spi0_cs1.mmc0_sdcd */
167 >;
168 };
169
170 i2c0_pins_default: i2c0_pins_default {
171 pinctrl-single,pins = <
172 AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
173 AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
174 >;
175 };
176
177 spi0_pins_default: spi0_pins_default {
178 pinctrl-single,pins = <
179 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
180 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
181 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
182 AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
183 >;
184 };
185
186 uart3_pins_default: uart3_pins_default {
187 pinctrl-single,pins = <
188 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* (L17) gmii1_rxd3.uart3_rxd */
189 AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLUP | MUX_MODE1) /* (L16) gmii1_rxd2.uart3_txd */
190 >;
191 };
192
193 cpsw_default: cpsw_default {
194 pinctrl-single,pins = <
195 /* Slave 1, RMII mode */
196 AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */
197 AM33XX_IOPAD(0x944, (PIN_INPUT_PULLUP | MUX_MODE0)) /* rmii1_refclk.rmii1_refclk */
198 AM33XX_IOPAD(0x940, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd0.rmii1_rxd0 */
199 AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxd1.rmii1_rxd1 */
200 AM33XX_IOPAD(0x910, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_rxerr.rmii1_rxerr */
201 AM33XX_IOPAD(0x928, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd0.rmii1_txd0 */
202 AM33XX_IOPAD(0x924, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txd1.rmii1_txd1 */
203 AM33XX_IOPAD(0x914, (PIN_OUTPUT_PULLDOWN | MUX_MODE1)) /* mii1_txen.rmii1_txen */
204 /* Slave 2, RMII mode */
205 AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wait0.rmii2_crs_dv */
206 AM33XX_IOPAD(0x908, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_col.rmii2_refclk */
207 AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a11.rmii2_rxd0 */
208 AM33XX_IOPAD(0x868, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_a10.rmii2_rxd1 */
209 AM33XX_IOPAD(0x874, (PIN_INPUT_PULLUP | MUX_MODE3)) /* gpmc_wpn.rmii2_rxerr */
210 AM33XX_IOPAD(0x854, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a5.rmii2_txd0 */
211 AM33XX_IOPAD(0x850, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a4.rmii2_txd1 */
212 AM33XX_IOPAD(0x840, (PIN_OUTPUT_PULLDOWN | MUX_MODE3)) /* gpmc_a0.rmii2_txen */
213 >;
214 };
215
216 cpsw_sleep: cpsw_sleep {
217 pinctrl-single,pins = <
218 /* Slave 1 reset value */
219 AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
220 AM33XX_IOPAD(0x944, (PIN_INPUT_PULLDOWN | MUX_MODE7))
221 AM33XX_IOPAD(0x940, (PIN_INPUT_PULLDOWN | MUX_MODE7))
222 AM33XX_IOPAD(0x93c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
223 AM33XX_IOPAD(0x910, (PIN_INPUT_PULLDOWN | MUX_MODE7))
224 AM33XX_IOPAD(0x928, (PIN_INPUT_PULLDOWN | MUX_MODE7))
225 AM33XX_IOPAD(0x924, (PIN_INPUT_PULLDOWN | MUX_MODE7))
226 AM33XX_IOPAD(0x914, (PIN_INPUT_PULLDOWN | MUX_MODE7))
227
228 /* Slave 2 reset value */
229 AM33XX_IOPAD(0x870, (PIN_INPUT_PULLDOWN | MUX_MODE7))
230 AM33XX_IOPAD(0x908, (PIN_INPUT_PULLDOWN | MUX_MODE7))
231 AM33XX_IOPAD(0x86c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
232 AM33XX_IOPAD(0x868, (PIN_INPUT_PULLDOWN | MUX_MODE7))
233 AM33XX_IOPAD(0x874, (PIN_INPUT_PULLDOWN | MUX_MODE7))
234 AM33XX_IOPAD(0x854, (PIN_INPUT_PULLDOWN | MUX_MODE7))
235 AM33XX_IOPAD(0x850, (PIN_INPUT_PULLDOWN | MUX_MODE7))
236 AM33XX_IOPAD(0x840, (PIN_INPUT_PULLDOWN | MUX_MODE7))
237 >;
238 };
239
240 davinci_mdio_default: davinci_mdio_default {
241 pinctrl-single,pins = <
242 /* MDIO */
243 AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)) /* mdio_data.mdio_data */
244 AM33XX_IOPAD(0x94c, (PIN_OUTPUT_PULLUP | MUX_MODE0)) /* mdio_clk.mdio_clk */
245 >;
246 };
247
248 davinci_mdio_sleep: davinci_mdio_sleep {
249 pinctrl-single,pins = <
250 /* MDIO reset value */
251 AM33XX_IOPAD(0x948, (PIN_INPUT_PULLDOWN | MUX_MODE7))
252 AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLDOWN | MUX_MODE7))
253 >;
254 };
255};
256
257&i2c0 {
258 pinctrl-names = "default";
259 pinctrl-0 = <&i2c0_pins_default>;
260
261 status = "okay";
262 clock-frequency = <400000>;
263
264 tps: power-controller@2d {
265 reg = <0x2d>;
266 };
267
268 tpic2810: gpio@60 {
269 compatible = "ti,tpic2810";
270 reg = <0x60>;
271 gpio-controller;
272 #gpio-cells = <2>;
273 };
274};
275
276#include "tps65910.dtsi"
277
278&tps {
279 vcc1-supply = <&vbat>;
280 vcc2-supply = <&vbat>;
281 vcc3-supply = <&vbat>;
282 vcc4-supply = <&vbat>;
283 vcc5-supply = <&vbat>;
284 vcc6-supply = <&vbat>;
285 vcc7-supply = <&vbat>;
286 vccio-supply = <&vbat>;
287
288 regulators {
289 vrtc_reg: regulator@0 {
290 regulator-always-on;
291 };
292
293 vio_reg: regulator@1 {
294 regulator-always-on;
295 };
296
297 vdd1_reg: regulator@2 {
298 regulator-name = "vdd_mpu";
299 regulator-min-microvolt = <912500>;
300 regulator-max-microvolt = <1326000>;
301 regulator-boot-on;
302 regulator-always-on;
303 };
304
305 vdd2_reg: regulator@3 {
306 regulator-name = "vdd_core";
307 regulator-min-microvolt = <912500>;
308 regulator-max-microvolt = <1144000>;
309 regulator-boot-on;
310 regulator-always-on;
311 };
312
313 vdd3_reg: regulator@4 {
314 regulator-always-on;
315 };
316
317 vdig1_reg: regulator@5 {
318 regulator-always-on;
319 };
320
321 vdig2_reg: regulator@6 {
322 regulator-always-on;
323 };
324
325 vpll_reg: regulator@7 {
326 regulator-always-on;
327 };
328
329 vdac_reg: regulator@8 {
330 regulator-always-on;
331 };
332
333 vaux1_reg: regulator@9 {
334 regulator-always-on;
335 };
336
337 vaux2_reg: regulator@10 {
338 regulator-always-on;
339 };
340
341 vaux33_reg: regulator@11 {
342 regulator-always-on;
343 };
344
345 vmmc_reg: regulator@12 {
346 regulator-min-microvolt = <1800000>;
347 regulator-max-microvolt = <3300000>;
348 regulator-always-on;
349 };
350 };
351};
352
353&mmc1 {
354 status = "okay";
355 vmmc-supply = <&vmmc_reg>;
356 bus-width = <4>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&mmc0_pins_default>;
359};
360
361&gpio0 {
362 /* Do not idle the GPIO used for holding the VTT regulator */
363 ti,no-reset-on-init;
364 ti,no-idle-on-init;
365
366 p7 {
367 gpio-hog;
368 gpios = <7 GPIO_ACTIVE_HIGH>;
369 output-high;
370 line-name = "FET_SWITCH_CTRL";
371 };
372};
373
374&uart3 {
375 pinctrl-names = "default";
376 pinctrl-0 = <&uart3_pins_default>;
377 status = "okay";
378};
379
380&gpio3 {
381 p4 {
382 gpio-hog;
383 gpios = <4 GPIO_ACTIVE_HIGH>;
384 output-high;
385 line-name = "PR1_MII_CTRL";
386 };
387
388 p10 {
389 gpio-hog;
390 gpios = <10 GPIO_ACTIVE_HIGH>;
391 output-high;
392 line-name = "MUX_MII_CTRL";
393 };
394};
395
396&cpsw_emac0 {
Grygorii Strashko3b3e8a32019-08-31 10:30:34 +0300[diff] [blame]397 phy-handle = <&ethphy0>;
Lokesh Vutla73ec6962016-05-16 11:47:28 +0530[diff] [blame]398 phy-mode = "rmii";
399 dual_emac_res_vlan = <1>;
400};
401
402&cpsw_emac1 {
Grygorii Strashko3b3e8a32019-08-31 10:30:34 +0300[diff] [blame]403 phy-handle = <&ethphy1>;
Lokesh Vutla73ec6962016-05-16 11:47:28 +0530[diff] [blame]404 phy-mode = "rmii";
405 dual_emac_res_vlan = <2>;
406};
407
408&mac {
409 pinctrl-names = "default", "sleep";
410 pinctrl-0 = <&cpsw_default>;
411 pinctrl-1 = <&cpsw_sleep>;
412 status = "okay";
413 dual_emac;
414};
415
416&phy_sel {
417 rmii-clock-ext;
418};
419
420&davinci_mdio {
421 pinctrl-names = "default", "sleep";
422 pinctrl-0 = <&davinci_mdio_default>;
423 pinctrl-1 = <&davinci_mdio_sleep>;
424 status = "okay";
425 reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
426 reset-delay-us = <2>; /* PHY datasheet states 1uS min */
Grygorii Strashko3b3e8a32019-08-31 10:30:34 +0300[diff] [blame]427
428 ethphy0: ethernet-phy@1 {
429 reg = <1>;
430 };
431
432 ethphy1: ethernet-phy@3 {
433 reg = <3>;
434 };
Lokesh Vutla73ec6962016-05-16 11:47:28 +0530[diff] [blame]435};
Faiz Abbas38e6ddc2020-09-14 12:11:13 +0530[diff] [blame]436
437&spi0 {
438 status = "okay";
439 pinctrl-names = "default";
440 pinctrl-0 = <&spi0_pins_default>;
441
442 sn65hvs882@1 {
443 compatible = "pisosr-gpio";
444 gpio-controller;
445 #gpio-cells = <2>;
446
447 load-gpios = <&gpio3 18 GPIO_ACTIVE_LOW>;
448
449 reg = <1>;
450 spi-max-frequency = <1000000>;
451 spi-cpol;
452 };
453
454 spi_nor: flash@0 {
455 #address-cells = <1>;
456 #size-cells = <1>;
457 compatible = "winbond,w25q64", "jedec,spi-nor";
458 spi-max-frequency = <80000000>;
459 m25p,fast-read;
460 reg = <0>;
461
462 partition@0 {
463 label = "u-boot-spl";
464 reg = <0x0 0x80000>;
465 read-only;
466 };
467
468 partition@1 {
469 label = "u-boot";
470 reg = <0x80000 0x100000>;
471 read-only;
472 };
473
474 partition@2 {
475 label = "u-boot-env";
476 reg = <0x180000 0x20000>;
477 read-only;
478 };
479
480 partition@3 {
481 label = "misc";
482 reg = <0x1A0000 0x660000>;
483 };
484 };
485};