blob: d39712a5135f470b275d1b3ad8b47774d67fc68b [file] [log] [blame]
Kumar Gala44a23cf2008-01-16 22:33:22 -06001/*
Kumar Galad30f9042009-09-11 11:27:00 -05002 * Copyright 2008-2009 Freescale Semiconductor, Inc.
Kumar Gala44a23cf2008-01-16 22:33:22 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/processor.h>
28#include <asm/mmu.h>
Kumar Galaecf5b982008-12-16 14:59:20 -060029#ifdef CONFIG_ADDR_MAP
30#include <addr_map.h>
31#endif
32
33DECLARE_GLOBAL_DATA_PTR;
Kumar Gala44a23cf2008-01-16 22:33:22 -060034
35void set_tlb(u8 tlb, u32 epn, u64 rpn,
36 u8 perms, u8 wimge,
37 u8 ts, u8 esel, u8 tsize, u8 iprot)
38{
39 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
40
41 _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
42 _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
43 _mas2 = FSL_BOOKE_MAS2(epn, wimge);
44 _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
Kumar Galad30f9042009-09-11 11:27:00 -050045 _mas7 = FSL_BOOKE_MAS7(rpn);
Kumar Gala44a23cf2008-01-16 22:33:22 -060046
Kumar Galad30f9042009-09-11 11:27:00 -050047 write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
Kumar Galaecf5b982008-12-16 14:59:20 -060048
49#ifdef CONFIG_ADDR_MAP
50 if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
51 addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel);
52#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -060053}
54
55void disable_tlb(u8 esel)
56{
57 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
58
59 _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
60 _mas1 = 0;
61 _mas2 = 0;
62 _mas3 = 0;
63 _mas7 = 0;
64
65 mtspr(MAS0, _mas0);
66 mtspr(MAS1, _mas1);
67 mtspr(MAS2, _mas2);
68 mtspr(MAS3, _mas3);
69#ifdef CONFIG_ENABLE_36BIT_PHYS
70 mtspr(MAS7, _mas7);
71#endif
72 asm volatile("isync;msync;tlbwe;isync");
Kumar Galaecf5b982008-12-16 14:59:20 -060073
74#ifdef CONFIG_ADDR_MAP
75 if (gd->flags & GD_FLG_RELOC)
76 addrmap_set_entry(0, 0, 0, esel);
77#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -060078}
79
80void invalidate_tlb(u8 tlb)
81{
82 if (tlb == 0)
83 mtspr(MMUCSR0, 0x4);
84 if (tlb == 1)
85 mtspr(MMUCSR0, 0x2);
86}
87
88void init_tlbs(void)
89{
Kumar Gala44a23cf2008-01-16 22:33:22 -060090 int i;
91
92 for (i = 0; i < num_tlb_entries; i++) {
93 set_tlb(tlb_table[i].tlb, tlb_table[i].epn, tlb_table[i].rpn,
94 tlb_table[i].perms, tlb_table[i].wimge,
95 tlb_table[i].ts, tlb_table[i].esel, tlb_table[i].tsize,
96 tlb_table[i].iprot);
97 }
Kumar Gala44a23cf2008-01-16 22:33:22 -060098
99 return ;
100}
Kumar Gala6fb1b732008-06-09 11:07:46 -0500101
Kumar Galac2287af2009-09-03 08:20:24 -0500102static void tlbsx (const volatile unsigned *addr)
103{
104 __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
105}
106
107/* return -1 if we didn't find anything */
108int find_tlb_idx(void *addr, u8 tlbsel)
109{
110 u32 _mas0, _mas1;
111
112 /* zero out Search PID, AS */
113 mtspr(MAS6, 0);
114
115 tlbsx(addr);
116
117 _mas0 = mfspr(MAS0);
118 _mas1 = mfspr(MAS1);
119
120 /* we found something, and its in the TLB we expect */
121 if ((MAS1_VALID & _mas1) &&
122 (MAS0_TLBSEL(tlbsel) == (_mas0 & MAS0_TLBSEL_MSK))) {
123 return ((_mas0 & MAS0_ESEL_MSK) >> 16);
124 }
125
126 return -1;
127}
128
Kumar Galaecf5b982008-12-16 14:59:20 -0600129#ifdef CONFIG_ADDR_MAP
130void init_addr_map(void)
131{
132 int i;
Kumar Galae393e2e2009-08-14 16:43:22 -0500133 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
Kumar Galaecf5b982008-12-16 14:59:20 -0600134
Kumar Galae393e2e2009-08-14 16:43:22 -0500135 /* walk all the entries */
136 for (i = 0; i < max_cam; i++) {
137 unsigned long epn;
Wolfgang Denk963f2f62009-08-22 23:27:26 +0200138 u32 tsize, _mas1;
Kumar Galae393e2e2009-08-14 16:43:22 -0500139 phys_addr_t rpn;
140
141 mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
142
143 asm volatile("tlbre;isync");
144 _mas1 = mfspr(MAS1);
145
146 /* if the entry isn't valid skip it */
147 if (!(_mas1 & MAS1_VALID))
Kumar Galaecf5b982008-12-16 14:59:20 -0600148 continue;
149
Kumar Galae393e2e2009-08-14 16:43:22 -0500150 tsize = (_mas1 >> 8) & 0xf;
151 epn = mfspr(MAS2) & MAS2_EPN;
152 rpn = mfspr(MAS3) & MAS3_RPN;
153#ifdef CONFIG_ENABLE_36BIT_PHYS
154 rpn |= ((phys_addr_t)mfspr(MAS7)) << 32;
155#endif
156
157 addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), i);
Kumar Galaecf5b982008-12-16 14:59:20 -0600158 }
159
160 return ;
161}
162#endif
163
Haiying Wang95026432009-01-13 16:29:22 -0500164#ifndef CONFIG_SYS_DDR_TLB_START
165#define CONFIG_SYS_DDR_TLB_START 8
166#endif
167
Kumar Gala6fb1b732008-06-09 11:07:46 -0500168unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
169{
170 unsigned int tlb_size;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600171 unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
172 unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
Fredrik Arnerup90d13b82009-06-02 16:27:10 -0500173 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600174 u64 size, memsize = (u64)memsize_in_meg << 20;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500175
Kumar Galaf8523cb2009-02-06 09:56:35 -0600176 size = min(memsize, CONFIG_MAX_MEM_MAPPED);
Kumar Gala6fb1b732008-06-09 11:07:46 -0500177
Kumar Galaf8523cb2009-02-06 09:56:35 -0600178 /* Convert (4^max) kB to (2^max) bytes */
179 max_cam = max_cam * 2 + 10;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500180
Kumar Galaf8523cb2009-02-06 09:56:35 -0600181 for (; size && ram_tlb_index < 16; ram_tlb_index++) {
182 u32 camsize = __ilog2_u64(size) & ~1U;
183 u32 align = __ilog2(ram_tlb_address) & ~1U;
184
185 if (align == -2) align = max_cam;
186 if (camsize > align)
187 camsize = align;
188
189 if (camsize > max_cam)
190 camsize = max_cam;
191
192 tlb_size = (camsize - 10) / 2;
193
Kumar Gala6fb1b732008-06-09 11:07:46 -0500194 set_tlb(1, ram_tlb_address, ram_tlb_address,
195 MAS3_SX|MAS3_SW|MAS3_SR, 0,
196 0, ram_tlb_index, tlb_size, 1);
197
Kumar Galaf8523cb2009-02-06 09:56:35 -0600198 size -= 1ULL << camsize;
199 memsize -= 1ULL << camsize;
200 ram_tlb_address += 1UL << camsize;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500201 }
202
Kumar Galaf8523cb2009-02-06 09:56:35 -0600203 if (memsize)
Kumar Galad4b130d2009-06-11 23:40:34 -0500204 print_size(memsize, " left unmapped\n");
Kumar Galaf8523cb2009-02-06 09:56:35 -0600205
Kumar Gala6fb1b732008-06-09 11:07:46 -0500206 /*
207 * Confirm that the requested amount of memory was mapped.
208 */
209 return memsize_in_meg;
210}