Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright 2022 Gateworks Corporation |
| 4 | */ |
| 5 | |
| 6 | #ifndef __IMX8MM_VENICE_H |
| 7 | #define __IMX8MM_VENICE_H |
| 8 | |
| 9 | #include <asm/arch/imx-regs.h> |
| 10 | #include <linux/sizes.h> |
| 11 | |
| 12 | #define CONFIG_SPL_MAX_SIZE (148 * 1024) |
| 13 | #define CONFIG_SYS_MONITOR_LEN SZ_512K |
| 14 | #define CONFIG_SYS_UBOOT_BASE \ |
| 15 | (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) |
| 16 | |
| 17 | #ifdef CONFIG_SPL_BUILD |
| 18 | #define CONFIG_SPL_STACK 0x980000 |
| 19 | #define CONFIG_SPL_BSS_START_ADDR 0x950000 |
| 20 | #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ |
| 21 | #define CONFIG_SYS_SPL_MALLOC_START 0x42200000 |
| 22 | #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ |
| 23 | |
| 24 | /* For RAW image gives a error info not panic */ |
| 25 | #define CONFIG_SPL_ABORT_ON_RAW_IMAGE |
| 26 | #endif |
| 27 | |
| 28 | #define MEM_LAYOUT_ENV_SETTINGS \ |
Tim Harvey | fd5c717 | 2022-04-13 08:25:10 -0700 | [diff] [blame] | 29 | "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| 30 | "fdt_addr_r=0x50200000\0" \ |
| 31 | "scriptaddr=0x50280000\0" \ |
| 32 | "ramdisk_addr_r=0x50300000\0" \ |
| 33 | "kernel_comp_addr_r=0x40200000\0" |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 34 | |
| 35 | /* Enable Distro Boot */ |
| 36 | #ifndef CONFIG_SPL_BUILD |
| 37 | #define BOOT_TARGET_DEVICES(func) \ |
| 38 | func(MMC, mmc, 1) \ |
| 39 | func(MMC, mmc, 2) \ |
Tim Harvey | c574736 | 2022-04-13 08:42:52 -0700 | [diff] [blame] | 40 | func(USB, usb, 0) \ |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 41 | func(DHCP, dhcp, na) |
| 42 | #include <config_distro_bootcmd.h> |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 43 | #else |
| 44 | #define BOOTENV |
| 45 | #endif |
| 46 | |
| 47 | /* Initial environment variables */ |
| 48 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 49 | BOOTENV \ |
| 50 | MEM_LAYOUT_ENV_SETTINGS \ |
| 51 | "script=boot.scr\0" \ |
| 52 | "bootm_size=0x10000000\0" \ |
| 53 | "dev=2\0" \ |
| 54 | "preboot=gsc wd-disable\0" \ |
| 55 | "console=ttymxc1,115200\0" \ |
| 56 | "update_firmware=" \ |
| 57 | "tftpboot $loadaddr $image && " \ |
| 58 | "setexpr blkcnt $filesize + 0x1ff && " \ |
| 59 | "setexpr blkcnt $blkcnt / 0x200 && " \ |
| 60 | "mmc dev $dev && " \ |
| 61 | "mmc write $loadaddr 0x40 $blkcnt\0" \ |
Tim Harvey | f3722dd | 2022-02-18 15:20:17 -0800 | [diff] [blame] | 62 | "loadfdt=" \ |
| 63 | "if $fsload $fdt_addr_r $dir/$fdt_file1; " \ |
| 64 | "then echo loaded $fdt_file1; " \ |
| 65 | "elif $fsload $fdt_addr_r $dir/$fdt_file2; " \ |
| 66 | "then echo loaded $fdt_file2; " \ |
| 67 | "elif $fsload $fdt_addr_r $dir/$fdt_file3; " \ |
| 68 | "then echo loaded $fdt_file3; " \ |
| 69 | "elif $fsload $fdt_addr_r $dir/$fdt_file4; " \ |
| 70 | "then echo loaded $fdt_file4; " \ |
| 71 | "elif $fsload $fdt_addr_r $dir/$fdt_file5; " \ |
| 72 | "then echo loaded $fdt_file5; " \ |
| 73 | "fi\0" \ |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 74 | "boot_net=" \ |
Tim Harvey | f3722dd | 2022-02-18 15:20:17 -0800 | [diff] [blame] | 75 | "setenv fsload tftpboot; " \ |
| 76 | "run loadfdt && tftpboot $kernel_addr_r $dir/Image && " \ |
| 77 | "booti $kernel_addr_r - $fdt_addr_r\0" \ |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 78 | "update_rootfs=" \ |
| 79 | "tftpboot $loadaddr $image && " \ |
| 80 | "gzwrite mmc $dev $loadaddr $filesize 100000 1000000\0" \ |
| 81 | "update_all=" \ |
| 82 | "tftpboot $loadaddr $image && " \ |
| 83 | "gzwrite mmc $dev $loadaddr $filesize\0" \ |
| 84 | "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0" |
| 85 | |
| 86 | #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 |
| 87 | #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M |
| 88 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 89 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 90 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 91 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 92 | |
| 93 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 94 | |
| 95 | /* SDRAM configuration */ |
| 96 | #define PHYS_SDRAM 0x40000000 |
Tim Harvey | 52ae8d6 | 2022-03-30 13:39:02 -0700 | [diff] [blame] | 97 | #define PHYS_SDRAM_SIZE SZ_4G |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 98 | #define CONFIG_SYS_BOOTM_LEN SZ_256M |
| 99 | |
| 100 | /* UART */ |
Marek Vasut | 52b6b48 | 2022-04-24 23:44:03 +0200 | [diff] [blame] | 101 | #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2) |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 102 | |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 103 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 104 | |
Tim Harvey | 2cb156e | 2022-02-11 10:48:56 -0800 | [diff] [blame] | 105 | #endif |