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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Phil Sutteraefb8f42015-12-25 14:41:25 +01002/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Phil Sutteraefb8f42015-12-25 14:41:25 +01004 */
5
6#ifndef _CONFIG_SYNOLOGY_DS414_H
7#define _CONFIG_SYNOLOGY_DS414_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Phil Sutteraefb8f42015-12-25 14:41:25 +010012
13/*
14 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
15 * for DDR ECC byte filling in the SPL before loading the main
16 * U-Boot into it.
17 */
Phil Sutteraefb8f42015-12-25 14:41:25 +010018#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
19
20/*
21 * Commands configuration
22 */
Phil Sutteraefb8f42015-12-25 14:41:25 +010023
24/* I2C */
25#define CONFIG_SYS_I2C
26#define CONFIG_SYS_I2C_MVTWSI
27#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
28#define CONFIG_SYS_I2C_SLAVE 0x0
29#define CONFIG_SYS_I2C_SPEED 100000
30
31/* SPI NOR flash default params, used by sf commands */
Phil Sutteraefb8f42015-12-25 14:41:25 +010032
33/* Environment in SPI NOR flash */
Phil Sutteraefb8f42015-12-25 14:41:25 +010034#define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */
35#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
36#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
37
Phil Sutteraefb8f42015-12-25 14:41:25 +010038#define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII
39
Phil Sutteraefb8f42015-12-25 14:41:25 +010040/* PCIe support */
41#ifndef CONFIG_SPL_BUILD
Phil Sutteraefb8f42015-12-25 14:41:25 +010042#define CONFIG_PCI_SCAN_SHOW
43#endif
44
45/* USB/EHCI/XHCI configuration */
46
Phil Sutteraefb8f42015-12-25 14:41:25 +010047#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
48
49/* FIXME: broken XHCI support
50 * Below defines should enable support for the two rear USB3 ports. Sadly, this
51 * does not work because:
52 * - xhci-pci seems to not support DM_USB, so with that enabled it is not
53 * found.
54 * - USB init fails, controller does not respond in time */
Phil Sutteraefb8f42015-12-25 14:41:25 +010055
Masahiro Yamada0a8cc1a2016-06-04 07:35:03 +090056#if !defined(CONFIG_USB_XHCI_HCD)
Phil Sutteraefb8f42015-12-25 14:41:25 +010057#define CONFIG_EHCI_IS_TDI
58#endif
59
60/* why is this only defined in mv-common.h if CONFIG_DM is undefined? */
Phil Sutteraefb8f42015-12-25 14:41:25 +010061
62/*
63 * mv-common.h should be defined after CMD configs since it used them
64 * to enable certain macros
65 */
66#include "mv-common.h"
67
68/*
69 * Memory layout while starting into the bin_hdr via the
70 * BootROM:
71 *
72 * 0x4000.4000 - 0x4003.4000 headers space (192KiB)
73 * 0x4000.4030 bin_hdr start address
74 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
75 * 0x4007.fffc BootROM stack top
76 *
77 * The address space between 0x4007.fffc and 0x400f.fff is not locked in
78 * L2 cache thus cannot be used.
79 */
80
81/* SPL */
82/* Defines for SPL */
Phil Sutteraefb8f42015-12-25 14:41:25 +010083#define CONFIG_SPL_TEXT_BASE 0x40004030
84#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
85
86#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
87#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
88
89#ifdef CONFIG_SPL_BUILD
90#define CONFIG_SYS_MALLOC_SIMPLE
91#endif
92
93#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
94#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
95
Phil Sutteraefb8f42015-12-25 14:41:25 +010096/* SPL related SPI defines */
Phil Sutteraefb8f42015-12-25 14:41:25 +010097#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
98
99/* DS414 bus width is 32bits */
100#define CONFIG_DDR_32BIT
101
Phil Sutteraefb8f42015-12-25 14:41:25 +0100102/* Default Environment */
103#define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm"
Phil Sutteraefb8f42015-12-25 14:41:25 +0100104#define CONFIG_LOADADDR 0x80000
105#undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */
106#define CONFIG_PREBOOT "usb start; sf probe"
107
108#endif /* _CONFIG_SYNOLOGY_DS414_H */