Marian Balakowicz | d326f4a | 2006-03-16 15:19:35 +0100 | [diff] [blame^] | 1 | |
| 2 | |
| 3 | Use cases for DDR 'ecc' command: |
| 4 | ================================ |
| 5 | |
| 6 | Before executing particular tests reset target board or clear status registers: |
| 7 | |
| 8 | => ecc captureclear |
| 9 | => ecc errdetectclr all |
| 10 | => ecc sbecnt 0 |
| 11 | |
| 12 | |
| 13 | Injecting Single-Bit Errors |
| 14 | --------------------------- |
| 15 | |
| 16 | 1. Set 1 bit in Data Path Error Inject Mask |
| 17 | |
| 18 | => ecc injectdatahi 1 |
| 19 | |
| 20 | 2. Run test over some memory region |
| 21 | |
| 22 | => ecc test 200000 10 |
| 23 | |
| 24 | 3. Check ECC status |
| 25 | |
| 26 | => ecc status |
| 27 | ... |
| 28 | Memory Data Path Error Injection Mask High/Low: 00000001 00000000 |
| 29 | ... |
| 30 | Memory Single-Bit Error Management (0..255): |
| 31 | Single-Bit Error Threshold: 255 |
| 32 | Single Bit Error Counter: 16 |
| 33 | ... |
| 34 | Memory Error Detect: |
| 35 | Multiple Memory Errors: 0 |
| 36 | Multiple-Bit Error: 0 |
| 37 | Single-Bit Error: 0 |
| 38 | ... |
| 39 | |
| 40 | 16 errors were generated, Single-Bit Error flag was not set as Single Bit Error |
| 41 | Counter did not reach Single-Bit Error Threshold. |
| 42 | |
| 43 | 4. Make sure used memory region got re-initialized with 0xcafecafe pattern |
| 44 | |
| 45 | => md 200000 |
| 46 | 00200000: cafecafe cafecafe cafecafe cafecafe ................ |
| 47 | 00200010: cafecafe cafecafe cafecafe cafecafe ................ |
| 48 | 00200020: cafecafe cafecafe cafecafe cafecafe ................ |
| 49 | 00200030: cafecafe cafecafe cafecafe cafecafe ................ |
| 50 | 00200040: cafecafe cafecafe cafecafe cafecafe ................ |
| 51 | 00200050: cafecafe cafecafe cafecafe cafecafe ................ |
| 52 | 00200060: cafecafe cafecafe cafecafe cafecafe ................ |
| 53 | 00200070: cafecafe cafecafe cafecafe cafecafe ................ |
| 54 | 00200080: deadbeef deadbeef deadbeef deadbeef ................ |
| 55 | 00200090: deadbeef deadbeef deadbeef deadbeef ................ |
| 56 | |
| 57 | |
| 58 | Injecting Multiple-Bit Errors |
| 59 | ----------------------------- |
| 60 | |
| 61 | 1. Set more than 1 bit in Data Path Error Inject Mask |
| 62 | |
| 63 | => ecc injectdatahi 5 |
| 64 | |
| 65 | 2. Run test over some memory region |
| 66 | |
| 67 | => ecc test 200000 10 |
| 68 | |
| 69 | 3. Check ECC status |
| 70 | |
| 71 | => ecc status |
| 72 | ... |
| 73 | Memory Data Path Error Injection Mask High/Low: 00000005 00000000 |
| 74 | ... |
| 75 | Memory Error Detect: |
| 76 | Multiple Memory Errors: 1 |
| 77 | Multiple-Bit Error: 1 |
| 78 | Single-Bit Error: 0 |
| 79 | ... |
| 80 | |
| 81 | Observe that both Multiple Memory Errors and Multiple-Bit Error flags are set. |
| 82 | |
| 83 | 4. Make sure used memory region got re-initialized with 0xcafecafe pattern |
| 84 | |
| 85 | => md 200000 |
| 86 | 00200000: cafecafe cafecafe cafecafe cafecafe ................ |
| 87 | 00200010: cafecafe cafecafe cafecafe cafecafe ................ |
| 88 | 00200020: cafecafe cafecafe cafecafe cafecafe ................ |
| 89 | 00200030: cafecafe cafecafe cafecafe cafecafe ................ |
| 90 | 00200040: cafecafe cafecafe cafecafe cafecafe ................ |
| 91 | 00200050: cafecafe cafecafe cafecafe cafecafe ................ |
| 92 | 00200060: cafecafe cafecafe cafecafe cafecafe ................ |
| 93 | 00200070: cafecafe cafecafe cafecafe cafecafe ................ |
| 94 | 00200080: deadbeef deadbeef deadbeef deadbeef ................ |
| 95 | 00200090: deadbeef deadbeef deadbeef deadbeef ................ |
| 96 | |
| 97 | |
| 98 | Test Single-Bit Error Counter and Threshold |
| 99 | ------------------------------------------- |
| 100 | |
| 101 | 1. Set 1 bit in Data Path Error Inject Mask |
| 102 | |
| 103 | => ecc injectdatahi 1 |
| 104 | |
| 105 | 2. Enable error injection |
| 106 | |
| 107 | => ecc inject en |
| 108 | |
| 109 | 3. Let u-boot run for a with Single-Bit error injection enabled |
| 110 | |
| 111 | 4. Disable error injection |
| 112 | |
| 113 | => ecc inject dis |
| 114 | |
| 115 | 4. Check status |
| 116 | |
| 117 | => ecc status |
| 118 | |
| 119 | ... |
| 120 | Memory Single-Bit Error Management (0..255): |
| 121 | Single-Bit Error Threshold: 255 |
| 122 | Single Bit Error Counter: 60 |
| 123 | |
| 124 | Memory Error Detect: |
| 125 | Multiple Memory Errors: 1 |
| 126 | Multiple-Bit Error: 0 |
| 127 | Single-Bit Error: 1 |
| 128 | ... |
| 129 | |
| 130 | Observe that Single-Bit Error is 'on' which means that Single-Bit Error Counter |
| 131 | reached Single-Bit Error Threshold. Multiple Memory Errors bit is also 'on', that |
| 132 | is Counter reached Threshold more than one time (it wraps back after reaching |
| 133 | Threshold). |
| 134 | |
| 135 | |