| Icenowy Zheng | a8407b5 | 2018-07-21 16:20:32 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_SUNXI=y |
| Tom Rini | e966471 | 2018-08-07 21:40:14 -0400 | [diff] [blame] | 3 | CONFIG_SPL=y |
| Icenowy Zheng | a8407b5 | 2018-07-21 16:20:32 +0800 | [diff] [blame] | 4 | CONFIG_MACH_SUN50I_H6=y |
| Andre Przywara | 770b85a | 2019-07-15 02:27:06 +0100 | [diff] [blame] | 5 | CONFIG_SUNXI_DRAM_H6_LPDDR3=y |
| Icenowy Zheng | a8407b5 | 2018-07-21 16:20:32 +0800 | [diff] [blame] | 6 | CONFIG_MMC0_CD_PIN="PF6" |
| 7 | CONFIG_MMC_SUNXI_SLOT_EXTRA=2 |
| Simon Glass | 37304aa | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 8 | CONFIG_USB3_VBUS_PIN="PL5" |
| Icenowy Zheng | a8407b5 | 2018-07-21 16:20:32 +0800 | [diff] [blame] | 9 | # CONFIG_PSCI_RESET is not set |
| Icenowy Zheng | a8407b5 | 2018-07-21 16:20:32 +0800 | [diff] [blame] | 10 | # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set |
| Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 11 | CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64" |
| Andre Przywara | f96238e | 2019-06-23 15:09:50 +0100 | [diff] [blame] | 12 | CONFIG_USB_EHCI_HCD=y |
| 13 | CONFIG_USB_OHCI_HCD=y |
| Andre Przywara | e66a34e | 2020-01-28 00:46:44 +0000 | [diff] [blame] | 14 | CONFIG_SPL_SPI_SUNXI=y |