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Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +02001/*
2 * am335x_sl50.h
3 *
4 * Copyright (C) 2015 Toby Churchill Ltd - http://www.toby-churchill.com/
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_AM335X_EVM_H
10#define __CONFIG_AM335X_EVM_H
11
12#include <configs/ti_am335x_common.h>
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020013
14#ifndef CONFIG_SPL_BUILD
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020015# define CONFIG_TIMESTAMP
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020016#endif
17
18#define CONFIG_SYS_BOOTM_LEN (16 << 20)
19
20/*#define CONFIG_MACH_TYPE 3589 Until the next sync */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020021
22/* Clock Defines */
23#define V_OSCK 24000000 /* Clock output from T2 */
24#define V_SCLK (V_OSCK)
25
26/* Always 128 KiB env size */
27#define CONFIG_ENV_SIZE (128 << 10)
28
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020029#ifndef CONFIG_SPL_BUILD
30
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020031#define MEM_LAYOUT_ENV_SETTINGS \
32 "scriptaddr=0x80000000\0" \
33 "pxefile_addr_r=0x80100000\0" \
34 "kernel_addr_r=0x82000000\0" \
35 "fdt_addr_r=0x88000000\0" \
36 "ramdisk_addr_r=0x88080000\0" \
37
38#define BOOT_TARGET_DEVICES(func) \
39 func(MMC, mmc, 0) \
40 func(MMC, mmc, 1)
41
42#define AM335XX_BOARD_FDTFILE \
43 "fdtfile=am335x-sl50.dtb\0" \
44
45#include <config_distro_bootcmd.h>
46
47#define CONFIG_EXTRA_ENV_SETTINGS \
48 AM335XX_BOARD_FDTFILE \
49 MEM_LAYOUT_ENV_SETTINGS \
50 BOOTENV
51
52#endif
53
54/* NS16550 Configuration */
55#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
56#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
57#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
58#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
59#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
60#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020061
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020062#define CONFIG_ENV_EEPROM_IS_ON_I2C
63#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
64#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020065
66/* PMIC support */
67#define CONFIG_POWER_TPS65217
68#define CONFIG_POWER_TPS65910
69
70/* SPL */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020071
72/* Bootcount using the RTC block */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020073#define CONFIG_SYS_BOOTCOUNT_BE
74
Faiz Abbasb432b1e2018-02-16 21:17:44 +053075#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USB_ETHER)
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020076/* Remove other SPL modes. */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020077/* disable host part of MUSB in SPL */
78#undef CONFIG_MUSB_HOST
79/* disable EFI partitions and partition UUID support */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020080#endif
81
82#if defined(CONFIG_EMMC_BOOT)
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020083#define CONFIG_SYS_MMC_ENV_DEV 1
84#define CONFIG_SYS_MMC_ENV_PART 2
85#define CONFIG_ENV_OFFSET 0x0
86#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
87#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
88#endif
89
90/* Network. */
Enric Balletbò i Serra9d1b2982015-09-07 07:43:20 +020091#define CONFIG_PHY_SMSC
92
93#endif /* ! __CONFIG_AM335X_SL50_H */