| Stefan Roese | d4451d3 | 2013-02-07 02:10:11 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | */ |
| 18 | |
| 19 | #define SDRAM_DDR /* is DDR */ |
| 20 | |
| 21 | #if defined(CONFIG_MPC5200) |
| 22 | /* Settings for XLB = 132 MHz */ |
| 23 | /* see is46r16320d datasheet and MPC5200UM chap. 8.6.1. */ |
| 24 | |
| 25 | /* SDRAM Config Standard timing */ |
| 26 | #define SDRAM_MODE 0x008d0000 |
| 27 | #define SDRAM_EMODE 0x40010000 |
| 28 | #define SDRAM_CONTROL 0x70430f00 |
| 29 | #define SDRAM_CONFIG1 0x33622930 |
| 30 | #define SDRAM_CONFIG2 0x46670000 |
| 31 | #define SDRAM_TAPDELAY 0x10000000 |
| 32 | |
| 33 | #else |
| 34 | #error CONFIG_MPC5200 not defined |
| 35 | #endif |