wdenk | c189600 | 2003-12-28 11:44:59 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
| 5 | * (C) Copyright 2003 |
| 6 | * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de |
| 7 | * |
| 8 | * See file CREDITS for list of people who contributed to this |
| 9 | * project. |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or |
| 12 | * modify it under the terms of the GNU General Public License as |
| 13 | * published by the Free Software Foundation; either version 2 of |
| 14 | * the License, or (at your option) any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 19 | * GNU General Public License for more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, write to the Free Software |
| 23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 24 | * MA 02111-1307 USA |
| 25 | */ |
| 26 | |
| 27 | #include <common.h> |
| 28 | #include <mpc5xxx.h> |
| 29 | #include <pci.h> |
| 30 | |
| 31 | /***************************************************************************** |
| 32 | * initialize SDRAM/DDRAM controller. |
| 33 | * TBD: get data from I2C EEPROM |
| 34 | *****************************************************************************/ |
| 35 | long int initdram (int board_type) |
| 36 | { |
| 37 | ulong dramsize = 0; |
| 38 | #ifndef CFG_RAMBOOT |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame^] | 39 | #if 0 |
wdenk | c189600 | 2003-12-28 11:44:59 +0000 | [diff] [blame] | 40 | ulong t; |
| 41 | ulong tap_del; |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame^] | 42 | #endif |
wdenk | c189600 | 2003-12-28 11:44:59 +0000 | [diff] [blame] | 43 | |
| 44 | #define MODE_EN 0x80000000 |
| 45 | #define SOFT_PRE 2 |
| 46 | #define SOFT_REF 4 |
| 47 | |
| 48 | /* configure SDRAM start/end */ |
| 49 | *(vu_long *)MPC5XXX_SDRAM_CS0CFG = (CFG_SDRAM_BASE & 0xFFF00000) | CFG_DRAM_RAM_SIZE; |
| 50 | *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000; /* disabled */ |
| 51 | |
| 52 | /* setup config registers */ |
| 53 | *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = CFG_DRAM_CONFIG1; |
| 54 | *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = CFG_DRAM_CONFIG2; |
| 55 | |
| 56 | /* unlock mode register */ |
| 57 | *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN; |
| 58 | /* precharge all banks */ |
| 59 | *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE; |
| 60 | #if CFG_DRAM_DDR |
| 61 | /* set extended mode register */ |
| 62 | *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_EMODE; |
| 63 | #endif |
| 64 | /* set mode register */ |
| 65 | *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE | 0x0400; |
| 66 | /* precharge all banks */ |
| 67 | *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_PRE; |
| 68 | /* auto refresh */ |
| 69 | *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL | MODE_EN | SOFT_REF; |
| 70 | /* set mode register */ |
| 71 | *(vu_short *)MPC5XXX_SDRAM_MODE = CFG_DRAM_MODE; |
| 72 | /* normal operation */ |
| 73 | *(vu_long *)MPC5XXX_SDRAM_CTRL = CFG_DRAM_CONTROL; |
| 74 | /* write default TAP delay */ |
| 75 | *(vu_long *)MPC5XXX_CDM_PORCFG = CFG_DRAM_TAP_DEL << 24; |
| 76 | |
| 77 | #if 0 |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame^] | 78 | for (tap_del = 0; tap_del < 32; tap_del++) |
| 79 | { |
wdenk | c189600 | 2003-12-28 11:44:59 +0000 | [diff] [blame] | 80 | *(vu_long *)MPC5XXX_CDM_PORCFG = tap_del << 24; |
| 81 | |
| 82 | printf ("\nTAP Delay:%x Filling DRAM...", *(vu_long *)MPC5XXX_CDM_PORCFG); |
| 83 | for (t = 0; t < 0x04000000; t+=4) |
| 84 | *(vu_long *) t = t; |
| 85 | printf ("Checking DRAM...\n"); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame^] | 86 | for (t = 0; t < 0x04000000; t+=4) |
| 87 | { |
wdenk | c189600 | 2003-12-28 11:44:59 +0000 | [diff] [blame] | 88 | ulong rval = *(vu_long *) t; |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame^] | 89 | if (rval != t) |
| 90 | { |
wdenk | c189600 | 2003-12-28 11:44:59 +0000 | [diff] [blame] | 91 | printf ("mismatch at %x: ", t); |
| 92 | printf (" 1.read %x", rval); |
| 93 | printf (" 2.read %x", *(vu_long *) t); |
| 94 | printf (" 3.read %x", *(vu_long *) t); |
| 95 | break; |
| 96 | } |
| 97 | } |
| 98 | } |
| 99 | #endif |
| 100 | #endif /* CFG_RAMBOOT */ |
| 101 | |
| 102 | dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20); |
| 103 | |
| 104 | /* return total ram size */ |
| 105 | return dramsize; |
| 106 | } |
| 107 | |
| 108 | /***************************************************************************** |
| 109 | * print board identification |
| 110 | *****************************************************************************/ |
| 111 | int checkboard (void) |
| 112 | { |
| 113 | #if defined (CONFIG_EVAL5200) |
| 114 | puts ("Board: EMK TOP5200 on EVAL5200\n"); |
| 115 | #else |
| 116 | #if defined (CONFIG_MINI5200) |
| 117 | puts ("Board: EMK TOP5200 on MINI5200\n"); |
| 118 | #else |
| 119 | puts ("Board: EMK TOP5200\n"); |
| 120 | #endif |
| 121 | #endif |
| 122 | return 0; |
| 123 | } |
| 124 | |
| 125 | /***************************************************************************** |
| 126 | * prepare for FLASH detection |
| 127 | *****************************************************************************/ |
| 128 | void flash_preinit(void) |
| 129 | { |
| 130 | /* |
| 131 | * Now, when we are in RAM, enable flash write |
| 132 | * access for detection process. |
| 133 | * Note that CS_BOOT cannot be cleared when |
| 134 | * executing in flash. |
| 135 | */ |
| 136 | *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */ |
| 137 | } |
| 138 | |
| 139 | /***************************************************************************** |
| 140 | * finalize FLASH setup |
| 141 | *****************************************************************************/ |
| 142 | void flash_afterinit(uint bank, ulong start, ulong size) |
| 143 | { |
| 144 | if (bank == 0) { /* adjust mapping */ |
| 145 | *(vu_long *)MPC5XXX_BOOTCS_START = |
| 146 | *(vu_long *)MPC5XXX_CS0_START = START_REG(start); |
| 147 | *(vu_long *)MPC5XXX_BOOTCS_STOP = |
| 148 | *(vu_long *)MPC5XXX_CS0_STOP = STOP_REG(start, size); |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | /***************************************************************************** |
| 153 | * otherinits after RAM is there and we are relocated to RAM |
| 154 | * note: though this is an int function, nobody cares for the result! |
| 155 | *****************************************************************************/ |
| 156 | int misc_init_r (void) |
| 157 | { |
| 158 | /* read 'factory' part of EEPROM */ |
| 159 | uchar buf[81]; |
| 160 | uchar *p; |
| 161 | uint length; |
| 162 | uint addr; |
| 163 | uint len; |
| 164 | |
| 165 | /* get length first */ |
| 166 | addr = CFG_FACT_OFFSET; |
| 167 | if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) { |
| 168 | bailout: |
| 169 | printf ("cannot read factory configuration\n"); |
| 170 | printf ("be sure to set ethaddr yourself!\n"); |
| 171 | return 0; |
| 172 | } |
| 173 | length = buf[0] + (buf[1] << 8); |
| 174 | addr += 2; |
| 175 | |
| 176 | /* sanity check */ |
| 177 | if (length < 20 || length > CFG_FACT_SIZE - 2) |
| 178 | goto bailout; |
| 179 | |
| 180 | /* read lines */ |
| 181 | while (length > 0) { |
| 182 | /* read one line */ |
| 183 | len = length > 80 ? 80 : length; |
| 184 | if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len)) |
| 185 | goto bailout; |
| 186 | /* mark end of buffer */ |
| 187 | buf[len] = 0; |
| 188 | /* search end of line */ |
| 189 | for (p = buf; *p && *p != 0x0a; p++); |
| 190 | if (!*p) |
| 191 | goto bailout; |
| 192 | *p++ = 0; |
| 193 | /* advance to next line start */ |
| 194 | length -= p - buf; |
| 195 | addr += p - buf; |
| 196 | /*printf ("%s\n", buf); */ |
| 197 | /* search for our specific entry */ |
| 198 | if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) { |
| 199 | setenv ("ethaddr", buf + 19); |
| 200 | } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) { |
| 201 | setenv ("serial#", buf + 15); |
| 202 | } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) { |
| 203 | setenv ("board_id", buf + 13); |
| 204 | } |
| 205 | } |
| 206 | return (0); |
| 207 | } |
| 208 | |
| 209 | /***************************************************************************** |
| 210 | * initialize the PCI system |
| 211 | *****************************************************************************/ |
| 212 | #ifdef CONFIG_PCI |
| 213 | static struct pci_controller hose; |
| 214 | |
| 215 | extern void pci_mpc5xxx_init(struct pci_controller *); |
| 216 | |
| 217 | void pci_init_board(void) |
| 218 | { |
| 219 | pci_mpc5xxx_init(&hose); |
| 220 | } |
| 221 | #endif |