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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / d4ca31c40e8888b36635967522ec7ea03fd7e70b / . / cpu / coldfire / start.S
blob: 44542231db9237dfb81660531f4c4890c7ec1723 [file] [log] [blame]
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]1/*
2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000-2003 Wolfgang Denk <wd@denx.de>
5 * Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include "version.h"
28
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]29#ifndef CONFIG_IDENT_STRING
30#define CONFIG_IDENT_STRING ""
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]31#endif
32
33#define MCF_MBAR 0x10000000
34#define MEM_BUILTIN_ADDR 0x20000000
35#define MEM_BUILTIN_SIZE 0x1000
36#define DRAM_ADDR 0x0
37#define DRAM_SIZE 0x400000
38
39 .text
40
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]41 .globl _start
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]42_start:
43 nop
44 nop
45 move.w #0x2700,%sr
46
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]47 move.l #0, %d0
48 movec %d0, %VBR
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]49
50#ifdef CONFIG_M5272
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]51 move.l #(MCF_MBAR+1), %d0
52 move.c %d0, %MBAR
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]53
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]54 move.l #(MEM_BUILTIN_ADDR+1), %d0
55 movec %d0, %RAMBAR0
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]56
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]57 move.l #0x01000000, %d0 /* Invalidate cache cmd */
58 movec %d0, %CACR /* Invalidate cache */
59 move.l #0x0000c000, %d0 /* Setup cache mask */
60 movec %d0, %ACR0 /* Enable cache */
61 move.l #0xff00c000, %d0 /* Setup cache mask */
62 movec %d0, %ACR1 /* Enable cache */
63 move.l #0x80000100, %d0 /* Setup cache mask */
64 movec %d0, %CACR /* Enable cache */
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]65#endif
66
67 move.l #_sbss,%a0
68 move.l #_ebss,%d0
691:
70 clr.l (%a0)+
71 cmp.l %a0,%d0
72 bne.s 1b
73
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]74/* move.l #MEM_BUILTIN_ADDR+MEM_BUILTIN_SIZE, %sp */
75 move.l #DRAM_ADDR+DRAM_SIZE, %sp
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]76 clr.l %sp@-
77
78 jsr board_init_f
79
80 .globl exception_handler
81exception_handler:
82 move.w #0x2700,%sr
83 lea %sp@(-60),%sp
84 movem.l %d0-%d7/%a0-%a6,%sp@
85 jsr do_exception
86 movem.l %sp@,%d0-%d7/%a0-%a6
87 lea %sp@(60),%sp
88 rte
89
90 .globl buserror_handler
91buserror_handler:
92 move.w #0x2700,%sr
93 lea %sp@(-60),%sp
94 movem.l %d0-%d7/%a0-%a6,%sp@
95 jsr do_buserror
96 movem.l %sp@,%d0-%d7/%a0-%a6
97 lea %sp@(60),%sp
98 rte
99
100 .globl addresserror_handler
101addresserror_handler:
102 move.w #0x2700,%sr
103 lea %sp@(-60),%sp
104 movem.l %d0-%d7/%a0-%a6,%sp@
105 jsr do_buserror
106 movem.l %sp@,%d0-%d7/%a0-%a6
107 lea %sp@(60),%sp
108 rte
109
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]110 .globl get_endaddr
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]111get_endaddr:
112 movel #_end,%d0
113 rts
114
115#ifdef CONFIG_M5272
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]116 .globl icache_enable
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]117icache_enable:
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]118 move.l #0x01000000, %d0 /* Invalidate cache cmd */
119 movec %d0, %CACR /* Invalidate cache */
120 move.l #0x0000c000, %d0 /* Setup cache mask */
121 movec %d0, %ACR0 /* Enable cache */
122 move.l #0xff00c000, %d0 /* Setup cache mask */
123 movec %d0, %ACR1 /* Enable cache */
124 move.l #0x80000100, %d0 /* Setup cache mask */
125 movec %d0, %CACR /* Enable cache */
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]126 moveq #1, %d0
127 move.l %d0, icache_state
128 rts
129
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]130 .globl icache_disable
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]131icache_disable:
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]132 move.l #0x00000100, %d0 /* Setup cache mask */
133 movec %d0, %CACR /* Enable cache */
134 clr.l %d0 /* Setup cache mask */
135 movec %d0, %ACR0 /* Enable cache */
136 movec %d0, %ACR1 /* Enable cache */
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]137 moveq #0, %d0
138 move.l %d0, icache_state
139 rts
140#endif
141
142#ifdef CONFIG_M5282
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]143 .globl icache_enable
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]144icache_enable:
145 rts
146
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]147 .globl icache_disable
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]148icache_disable:
149 rts
150#endif
151
152 .globl icache_status
153icache_status:
154 move.l icache_state, %d0
155 rts
156
157 .data
158icache_state:
159 .long 1
160
wdenkd4ca31c2004-01-02 14:00:00 +0000[diff] [blame^]161 .globl version_string
wdenk4e5ca3e2003-12-08 01:34:36 +0000[diff] [blame]162version_string:
163 .ascii U_BOOT_VERSION
164 .ascii " (", __DATE__, " - ", __TIME__, ")"
165 .ascii CONFIG_IDENT_STRING, "\0"