blob: 1318f5e5ee4456591ffca2351ed8c53309965f16 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +04002/*
3 * Copyright (C) 2011-2014 Pierrick Hascoet, Abilis Systems
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +04004 */
5
6#ifndef _CONFIG_TB100_H_
7#define _CONFIG_TB100_H_
8
9#include <linux/sizes.h>
10
11/*
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040012 * Memory configuration
13 */
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040014
Tom Rini65cc0e22022-11-16 13:10:41 -050015#define CFG_SYS_DDR_SDRAM_BASE 0x80000000
16#define CFG_SYS_SDRAM_BASE CFG_SYS_DDR_SDRAM_BASE
Tom Riniaa6e94d2022-11-16 13:10:37 -050017#define CFG_SYS_SDRAM_SIZE SZ_128M
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040018
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040019/*
20 * UART configuration
21 */
Tom Rini91092132022-11-16 13:10:28 -050022#define CFG_SYS_NS16550_CLK 166666666
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040023
24/*
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040025 * Even though the board houses Realtek RTL8211E PHY
26 * corresponding PHY driver (drivers/net/phy/realtek.c) behaves unexpectedly.
27 * In particular "parse_status" reports link is down.
28 *
29 * Until Realtek PHY driver is fixed fall back to generic PHY driver
30 * which implements all required functionality and behaves much more stable.
31 *
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040032 *
33 */
34
35/*
36 * Ethernet configuration
37 */
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040038#define ETH0_BASE_ADDRESS 0xFE100000
39#define ETH1_BASE_ADDRESS 0xFE110000
40
41/*
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040042 * Console configuration
43 */
Alexey Brodkin7f6a6db2014-05-21 14:39:32 +040044
45#endif /* _CONFIG_TB100_H_ */