blob: 480b36658ee921b162240d5658e03dfe59603f92 [file] [log] [blame]
Simon Glass51e9dad2015-03-02 12:40:54 -07001/dts-v1/;
2
3/include/ "skeleton.dtsi"
4/include/ "serial.dtsi"
Bin Meng93f8a312015-07-15 16:23:39 +08005/include/ "rtc.dtsi"
Bin Meng80af3982015-11-13 00:11:22 -08006/include/ "tsc_timer.dtsi"
Simon Glass51e9dad2015-03-02 12:40:54 -07007
8/ {
9 model = "Google Panther";
10 compatible = "google,panther", "intel,haswell";
11
12 aliases {
Bin Meng81aaa3d2016-01-27 00:56:34 -080013 spi0 = &spi;
Simon Glass51e9dad2015-03-02 12:40:54 -070014 };
15
16 config {
17 silent-console = <0>;
18 no-keyboard;
19 };
20
Simon Glass51e9dad2015-03-02 12:40:54 -070021 chosen {
22 stdout-path = "/serial";
23 };
24
Simon Glass548fb872015-08-27 19:54:48 -060025 pci {
26 compatible = "pci-x86";
27 #address-cells = <3>;
28 #size-cells = <2>;
29 u-boot,dm-pre-reloc;
30 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
31 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
32 0x01000000 0x0 0x1000 0x1000 0 0xf000>;
Simon Glass548fb872015-08-27 19:54:48 -060033
Simon Glassf2b85ab2016-01-18 20:19:21 -070034 pch@1f,0 {
35 reg = <0x0000f800 0 0 0 0>;
36 compatible = "intel,pch9";
Bin Meng3ddc1c72016-02-01 01:40:47 -080037 #address-cells = <1>;
38 #size-cells = <1>;
Simon Glassf2b85ab2016-01-18 20:19:21 -070039
Bin Meng81aaa3d2016-01-27 00:56:34 -080040 spi: spi {
Simon Glassf2b85ab2016-01-18 20:19:21 -070041 #address-cells = <1>;
42 #size-cells = <0>;
Bin Meng1f9eb592016-02-01 01:40:37 -080043 compatible = "intel,ich9-spi";
Simon Glassf2b85ab2016-01-18 20:19:21 -070044 spi-flash@0 {
45 #size-cells = <1>;
46 #address-cells = <1>;
47 reg = <0>;
48 compatible = "winbond,w25q64",
49 "spi-flash";
50 memory-map = <0xff800000 0x00800000>;
51 rw-mrc-cache {
52 label = "rw-mrc-cache";
53 reg = <0x003e0000 0x00010000>;
54 };
55 };
Simon Glass51e9dad2015-03-02 12:40:54 -070056 };
Bin Meng3ddc1c72016-02-01 01:40:47 -080057
58 gpioa {
59 compatible = "intel,ich6-gpio";
60 u-boot,dm-pre-reloc;
61 reg = <0 0x10>;
62 bank-name = "A";
63 };
64
65 gpiob {
66 compatible = "intel,ich6-gpio";
67 u-boot,dm-pre-reloc;
68 reg = <0x30 0x10>;
69 bank-name = "B";
70 };
71
72 gpioc {
73 compatible = "intel,ich6-gpio";
74 u-boot,dm-pre-reloc;
75 reg = <0x40 0x10>;
76 bank-name = "C";
77 };
Simon Glass51e9dad2015-03-02 12:40:54 -070078 };
79 };
80
Simon Glass6e474ea2015-08-22 18:31:37 -060081 tpm {
82 reg = <0xfed40000 0x5000>;
83 compatible = "infineon,slb9635lpc";
84 };
85
Simon Glass51e9dad2015-03-02 12:40:54 -070086};