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Bartlomiej Siekafa1df302007-07-11 20:11:07 +02001/*
2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 */
30#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
31#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +020032#define CONFIG_CM5200 1 /* ... on CM5200 platform */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020033
Becky Bruce31d82672008-05-08 19:02:12 -050034#define CONFIG_HIGH_BATS 1 /* High BATs supported */
35
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020036/*
37 * Supported commands
38 */
Wolfgang Denkafaac862007-08-12 14:27:39 +020039#include <config_cmd_default.h>
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020040
Wolfgang Denkafaac862007-08-12 14:27:39 +020041#define CONFIG_CMD_ASKENV
42#define CONFIG_CMD_BSP
43#define CONFIG_CMD_DATE
44#define CONFIG_CMD_DHCP
45#define CONFIG_CMD_DIAG
46#define CONFIG_CMD_FAT
47#define CONFIG_CMD_I2C
48#define CONFIG_CMD_JFFS2
49#define CONFIG_CMD_MII
50#define CONFIG_CMD_NFS
51#define CONFIG_CMD_PING
52#define CONFIG_CMD_REGINFO
53#define CONFIG_CMD_SNTP
54#define CONFIG_CMD_USB
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020055
56/*
57 * Serial console configuration
58 */
59#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
60#define CONFIG_BAUDRATE 57600 /* ... at 57600 bps */
61#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +020062#define CONFIG_SILENT_CONSOLE 1 /* needed to silence i2c_init() */
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020063
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020064/*
65 * Ethernet configuration
66 */
67#define CONFIG_MPC5xxx_FEC 1
68#define CONFIG_PHY_ADDR 0x00
69#define CONFIG_ENV_OVERWRITE 1 /* allow overwriting of ethaddr */
70/* use misc_init_r() to read ethaddr from I2C EEPROM (see CFG_I2C_EEPROM) */
71#define CONFIG_MISC_INIT_R 1
72#define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
73
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020074/*
75 * POST support
76 */
77#define CONFIG_POST (CFG_POST_MEMORY | CFG_POST_CPU | CFG_POST_I2C)
78#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
79/* List of I2C addresses to be verified by POST */
80#define I2C_ADDR_LIST { CFG_I2C_SLAVE, CFG_I2C_IO, CFG_I2C_EEPROM }
81
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020082/* display image timestamps */
83#define CONFIG_TIMESTAMP 1
84
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020085/*
86 * Autobooting
87 */
88#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
89#define CONFIG_PREBOOT "echo;" \
90 "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
91 "echo"
92#undef CONFIG_BOOTARGS
93
94/*
95 * Default environment settings
96 */
97#define CONFIG_EXTRA_ENV_SETTINGS \
98 "netdev=eth0\0" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +020099 "netmask=255.255.0.0\0" \
100 "ipaddr=192.168.160.33\0" \
101 "serverip=192.168.1.1\0" \
102 "gatewayip=192.168.1.1\0" \
103 "console=ttyPSC0\0" \
104 "u-boot_addr=100000\0" \
105 "kernel_addr=200000\0" \
106 "kernel_addr_flash=fc0c0000\0" \
107 "fdt_addr=400000\0" \
108 "fdt_addr_flash=fc0a0000\0" \
109 "ramdisk_addr=500000\0" \
110 "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200111 "u-boot=/tftpboot/cm5200/u-boot.bin\0" \
112 "bootfile_fdt=/tftpboot/cm5200/uImage\0" \
113 "fdt_file=/tftpboot/cm5200/cm5200.dtb\0" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200114 "load=tftp ${u-boot_addr} ${u-boot}\0" \
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200115 "update=prot off fc000000 +${filesize}; " \
116 "era fc000000 +${filesize}; " \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200117 "cp.b ${u-boot_addr} fc000000 ${filesize}; " \
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200118 "prot on fc000000 +${filesize}\0" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200119 "nfsargs=setenv bootargs root=/dev/nfs rw " \
120 "nfsroot=${serverip}:${rootpath}\0" \
121 "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0" \
122 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
123 "addinit=setenv bootargs ${bootargs} init=/linuxrc\0" \
124 "addcons=setenv bootargs ${bootargs} " \
125 "console=${console},${baudrate}\0" \
126 "addip=setenv bootargs ${bootargs} " \
127 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
128 "${netmask}:${hostname}:${netdev}:off panic=1\0" \
129 "flash_flash=run flashargs addinit addip addcons;" \
130 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0" \
131 "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; " \
132 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip " \
133 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0" \
134 ""
135#define CONFIG_BOOTCOMMAND "run flash_flash"
136
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200137/*
138 * Low level configuration
139 */
140
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200141/*
142 * Clock configuration
143 */
144#define CFG_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
145#define CFG_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
146
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200147/*
148 * Memory map
149 */
150#define CFG_MBAR 0xF0000000
151#define CFG_SDRAM_BASE 0x00000000
152#define CFG_DEFAULT_MBAR 0x80000000
153
154#define CFG_LOWBOOT 1
155
156/* Use ON-Chip SRAM until RAM will be available */
157#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
158#ifdef CONFIG_POST
159/* preserve space for the post_word at end of on-chip SRAM */
160#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
161#else
162#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
163#endif
164
165#define CFG_GBL_DATA_SIZE 128 /* size in bytes for initial data */
166#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200167#define CONFIG_BOARD_TYPES 1 /* we use board_type */
168
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200169#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
170
171#define CFG_MONITOR_BASE TEXT_BASE
172#define CFG_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
173#define CFG_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
174#define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
175
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200176/*
177 * Flash configuration
178 */
179#define CFG_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200180#define CONFIG_FLASH_CFI_DRIVER 1
Wolfgang Denkbe5d72d2007-08-13 21:57:53 +0200181#define CFG_FLASH_BASE 0xfc000000
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200182/* we need these despite using CFI */
183#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */
184#define CFG_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
185#define CFG_FLASH_SIZE 0x02000000 /* 32 MiB */
186
187
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200188#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
189#define CFG_RAMBOOT 1
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200190#undef CFG_LOWBOOT
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200191#endif
192
193
194/*
195 * Chip selects configuration
196 */
197/* Boot Chipselect */
198#define CFG_BOOTCS_START CFG_FLASH_BASE
199#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
200#define CFG_BOOTCS_CFG 0x00087D31 /* for pci_clk = 33 MHz */
201/* use board_early_init_r to enable flash write in CS_BOOT */
202#define CONFIG_BOARD_EARLY_INIT_R
203
204/* Flash memory addressing */
205#define CFG_CS0_START CFG_FLASH_BASE
206#define CFG_CS0_SIZE CFG_FLASH_SIZE
207
208/* No burst, dead cycle = 1 for CS0 (Flash) */
209#define CFG_CS_BURST 0x00000000
210#define CFG_CS_DEADCYCLE 0x00000001
211
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200212/*
213 * SDRAM configuration
214 * settings for k4s561632E-xx75, assuming XLB = 132 MHz
215 */
216#define SDRAM_MODE 0x00CD0000 /* CASL 3, burst length 8 */
217#define SDRAM_CONTROL 0x514F0000
218#define SDRAM_CONFIG1 0xE2333900
219#define SDRAM_CONFIG2 0x8EE70000
220
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200221/*
222 * MTD configuration
223 */
224#define CONFIG_JFFS2_CMDLINE 1
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200225#define MTDIDS_DEFAULT "nor0=cm5200-0"
226#define MTDPARTS_DEFAULT "mtdparts=cm5200-0:" \
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200227 "384k(uboot),128k(env)," \
228 "128k(redund_env),128k(dtb)," \
229 "2m(kernel),27904k(rootfs)," \
230 "-(config)"
231
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200232/*
233 * I2C configuration
234 */
235#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
236#define CFG_I2C_MODULE 2 /* Select I2C module #2 */
237#define CFG_I2C_SPEED 40000 /* 40 kHz */
238#define CFG_I2C_SLAVE 0x0
239#define CFG_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
240#define CFG_I2C_EEPROM 0x53 /* I2C EEPROM device address */
241
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200242/*
243 * RTC configuration
244 */
245#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
246
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200247/*
248 * USB configuration
249 */
250#define CONFIG_USB_OHCI 1
251#define CONFIG_USB_STORAGE 1
252#define CONFIG_USB_CLOCK 0x0001BBBB
253#define CONFIG_USB_CONFIG 0x00001000
254/* Partitions (for USB) */
255#define CONFIG_MAC_PARTITION 1
256#define CONFIG_DOS_PARTITION 1
257#define CONFIG_ISO_PARTITION 1
258
259/*
260 * Invoke our last_stage_init function - needed by fwupdate
261 */
262#define CONFIG_LAST_STAGE_INIT 1
263
264/*
265 * Environment settings
266 */
267#define CFG_ENV_IS_IN_FLASH 1
268#define CFG_ENV_SIZE 0x10000
269#define CFG_ENV_SECT_SIZE 0x20000
270#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
271/* Configuration of redundant environment */
272#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
273#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
274
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200275/*
276 * Pin multiplexing configuration
277 */
278
279/*
280 * CS1/GPIO_WKUP_6: GPIO (default)
281 * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
282 * IRDA/PSC6: UART
283 * Ether: Ethernet 100Mbit with MD
284 * PCI_DIS: PCI controller disabled
285 * USB: USB
286 * PSC3: SPI with UART3
287 * PSC2: UART
288 * PSC1: UART
289 */
290#define CFG_GPS_PORT_CONFIG 0x10559C44
291
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200292/*
293 * Miscellaneous configurable options
294 */
295#define CFG_LONGHELP 1 /* undef to save memory */
296#define CFG_PROMPT "=> " /* Monitor Command Prompt */
297#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
298#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
299#define CFG_MAXARGS 16 /* max number of command args */
300#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
301
302#define CFG_ALT_MEMTEST 1
303#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
304#define CFG_MEMTEST_END 0x03f00000 /* 1 .. 63 MiB in SDRAM */
305
306#define CONFIG_LOOPW 1
307
308#define CFG_LOAD_ADDR 0x100000 /* default load address */
309#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
310
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200311/*
312 * Various low-level settings
313 */
314#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
315#define CFG_HID0_FINAL HID0_ICE
316
317#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
318#define BOOTFLAG_WARM 0x02 /* Software reboot */
319
320#define CFG_XLB_PIPELINING 1 /* enable transaction pipeling */
321
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200322/*
323 * Cache Configuration
324 */
325#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Wolfgang Denkafaac862007-08-12 14:27:39 +0200326#ifdef CONFIG_CMD_KGDB
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200327#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
328#endif
329
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200330/*
331 * Flat Device Tree support
332 */
Bartlomiej Sieka86b116b2007-08-03 12:08:16 +0200333#define CONFIG_OF_LIBFDT 1
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200334#define CONFIG_OF_BOARD_SETUP 1
Bartlomiej Siekafa1df302007-07-11 20:11:07 +0200335#define OF_CPU "PowerPC,5200@0"
336#define OF_SOC "soc5200@f0000000"
337#define OF_TBCLK (bd->bi_busfreq / 4)
338#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
339
340#endif /* __CONFIG_H */