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Troy Kisky8682aba2012-02-07 14:08:48 +00001#ifndef _MICREL_H
2
3#define MII_KSZ9021_EXT_COMMON_CTRL 0x100
4#define MII_KSZ9021_EXT_STRAP_STATUS 0x101
5#define MII_KSZ9021_EXT_OP_STRAP_OVERRIDE 0x102
6#define MII_KSZ9021_EXT_OP_STRAP_STATUS 0x103
7#define MII_KSZ9021_EXT_RGMII_CLOCK_SKEW 0x104
8#define MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW 0x105
9#define MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW 0x106
10#define MII_KSZ9021_EXT_ANALOG_TEST 0x107
SARTRE Leo42a7cb52013-04-30 16:57:25 +020011/* Register operations */
12#define MII_KSZ9031_MOD_REG 0x0000
13/* Data operations */
14#define MII_KSZ9031_MOD_DATA_NO_POST_INC 0x4000
15#define MII_KSZ9031_MOD_DATA_POST_INC_RW 0x8000
16#define MII_KSZ9031_MOD_DATA_POST_INC_W 0xC000
Troy Kisky8682aba2012-02-07 14:08:48 +000017
Stefano Babic71817a12013-09-02 15:42:28 +020018#define MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW 0x4
19#define MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW 0x5
20#define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW 0x6
21#define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW 0x8
22
Otavio Salvadorf0222902015-07-28 20:24:41 -030023/* Registers */
24#define MMD_ACCESS_CONTROL 0xd
25#define MMD_ACCESS_REG_DATA 0xe
26
Troy Kisky8682aba2012-02-07 14:08:48 +000027struct phy_device;
28int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val);
29int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum);
30
SARTRE Leo42a7cb52013-04-30 16:57:25 +020031int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr,
32 int regnum, u16 mode, u16 val);
33int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
34 int regnum, u16 mode);
35
Troy Kisky8682aba2012-02-07 14:08:48 +000036#endif