blob: 2fb2b0da6d3f3a32bcf9ca7897b0ecaa7bf8a72a [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Kever Yangbbd6e6d2017-11-28 16:04:15 +08002/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd
Kever Yangbbd6e6d2017-11-28 16:04:15 +08004 */
5
6/dts-v1/;
7
8#include "rk3128.dtsi"
9
10/ {
11 model = "Rockchip RK3128 Evaluation board";
12 compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
13
14 chosen {
15 stdout-path = &uart2;
16 };
17
18 vcc5v0_otg: vcc5v0-otg-drv {
19 compatible = "regulator-fixed";
20 regulator-name = "vcc5v0_otg";
21 gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
22 pinctrl-names = "default";
23 pinctrl-0 = <&otg_vbus_drv>;
24 regulator-min-microvolt = <5000000>;
25 regulator-max-microvolt = <5000000>;
26 };
27
28 vcc5v0_host: vcc5v0-host-drv {
29 compatible = "regulator-fixed";
30 regulator-name = "vcc5v0_host";
31 gpio = <&gpio2 23 GPIO_ACTIVE_HIGH>;
32 pinctrl-names = "default";
33 pinctrl-0 = <&host_vbus_drv>;
34 regulator-min-microvolt = <5000000>;
35 regulator-max-microvolt = <5000000>;
36 regulator-always-on;
37 };
38};
39
40&i2c1 {
41 status = "okay";
42
43 hym8563: hym8563@51 {
44 compatible = "haoyu,hym8563";
45 reg = <0x51>;
46 #clock-cells = <0>;
47 clock-frequency = <32768>;
48 clock-output-names = "xin32k";
49 };
50};
51
52&u2phy {
53 status = "okay";
54};
55
56&u2phy_otg {
57 status = "okay";
58};
59
60&u2phy_host {
61 status = "okay";
62};
63
64&usb_host_ehci {
65 status = "okay";
66};
67
68&usb_host_ohci {
69 status = "okay";
70};
71
72&usb_otg {
73 vbus-supply = <&vcc5v0_otg>;
74 status = "okay";
75};
76
77&emmc {
78 fifo-mode;
79 status = "okay";
80};
81
82&pinctrl {
83 usb_otg {
84 otg_vbus_drv: host-vbus-drv {
85 rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
86 };
87 };
88
89 usb_host {
90 host_vbus_drv: host-vbus-drv {
91 rockchip,pins = <2 23 RK_FUNC_GPIO &pcfg_pull_none>;
92 };
93 };
94};