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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
York Sunee52b182012-10-11 07:13:37 +00002/*
3 * Copyright 2008-2012 Freescale Semiconductor, Inc.
4 *
5 * (C) Copyright 2000
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
York Sunee52b182012-10-11 07:13:37 +00007 */
8
9#include <common.h>
10#include <asm/fsl_law.h>
11#include <asm/mmu.h>
12
13struct law_entry law_table[] = {
14 SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
15#ifdef CONFIG_SYS_BMAN_MEM_PHYS
16 SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
17#endif
18#ifdef CONFIG_SYS_QMAN_MEM_PHYS
19 SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
20#endif
York Sun1cb19fb2013-06-27 10:48:29 -070021#ifdef QIXIS_BASE_PHYS
York Sunee52b182012-10-11 07:13:37 +000022 SET_LAW(QIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
York Sun1cb19fb2013-06-27 10:48:29 -070023#endif
York Sunee52b182012-10-11 07:13:37 +000024#ifdef CONFIG_SYS_DCSRBAR_PHYS
Stephen George49e946c2013-03-25 07:40:12 +000025 /* Limit DCSR to 32M to access NPC Trace Buffer */
26 SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
York Sunee52b182012-10-11 07:13:37 +000027#endif
28#ifdef CONFIG_SYS_NAND_BASE_PHYS
Prabhakar Kushwahaac13eb52012-12-18 00:15:45 +000029 SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
York Sunee52b182012-10-11 07:13:37 +000030#endif
31};
32
33int num_law_entries = ARRAY_SIZE(law_table);