Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | |
| 10 | /* |
| 11 | * CPU test |
| 12 | * Integer compare instructions: cmpw, cmplw |
| 13 | * |
| 14 | * To verify these instructions the test runs them with |
| 15 | * different combinations of operands, reads the condition |
| 16 | * register value and compares it with the expected one. |
| 17 | * The test contains a pre-built table |
| 18 | * containing the description of each test case: the instruction, |
| 19 | * the values of the operands, the condition field to save |
| 20 | * the result in and the expected result. |
| 21 | */ |
| 22 | |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 23 | #include <post.h> |
| 24 | #include "cpu_asm.h" |
| 25 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 26 | #if CONFIG_POST & CONFIG_SYS_POST_CPU |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 27 | |
| 28 | extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); |
| 29 | |
| 30 | static struct cpu_post_cmp_s |
| 31 | { |
| 32 | ulong cmd; |
| 33 | ulong op1; |
| 34 | ulong op2; |
| 35 | ulong cr; |
| 36 | ulong res; |
| 37 | } cpu_post_cmp_table[] = |
| 38 | { |
| 39 | { |
| 40 | OP_CMPW, |
| 41 | 123, |
| 42 | 123, |
| 43 | 2, |
| 44 | 0x02 |
| 45 | }, |
| 46 | { |
| 47 | OP_CMPW, |
| 48 | 123, |
| 49 | 133, |
| 50 | 3, |
| 51 | 0x08 |
| 52 | }, |
| 53 | { |
| 54 | OP_CMPW, |
| 55 | 123, |
| 56 | -133, |
| 57 | 4, |
| 58 | 0x04 |
| 59 | }, |
| 60 | { |
| 61 | OP_CMPLW, |
| 62 | 123, |
| 63 | 123, |
| 64 | 2, |
| 65 | 0x02 |
| 66 | }, |
| 67 | { |
| 68 | OP_CMPLW, |
| 69 | 123, |
| 70 | -133, |
| 71 | 3, |
| 72 | 0x08 |
| 73 | }, |
| 74 | { |
| 75 | OP_CMPLW, |
| 76 | 123, |
| 77 | 113, |
| 78 | 4, |
| 79 | 0x04 |
| 80 | }, |
| 81 | }; |
Mike Frysinger | d239781 | 2011-05-10 07:28:35 +0000 | [diff] [blame] | 82 | static unsigned int cpu_post_cmp_size = ARRAY_SIZE(cpu_post_cmp_table); |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 83 | |
| 84 | int cpu_post_test_cmp (void) |
| 85 | { |
| 86 | int ret = 0; |
| 87 | unsigned int i; |
Stefan Roese | f2302d4 | 2008-08-06 14:05:38 +0200 | [diff] [blame] | 88 | int flag = disable_interrupts(); |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 89 | |
| 90 | for (i = 0; i < cpu_post_cmp_size && ret == 0; i++) |
| 91 | { |
| 92 | struct cpu_post_cmp_s *test = cpu_post_cmp_table + i; |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 93 | unsigned long code[] = |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 94 | { |
| 95 | ASM_2C(test->cmd, test->cr, 3, 4), |
| 96 | ASM_MFCR(3), |
| 97 | ASM_BLR |
| 98 | }; |
| 99 | ulong res; |
| 100 | |
| 101 | cpu_post_exec_12 (code, & res, test->op1, test->op2); |
| 102 | |
| 103 | ret = ((res >> (28 - 4 * test->cr)) & 0xe) == test->res ? 0 : -1; |
| 104 | |
| 105 | if (ret != 0) |
| 106 | { |
| 107 | post_log ("Error at cmp test %d !\n", i); |
| 108 | } |
| 109 | } |
| 110 | |
Stefan Roese | f2302d4 | 2008-08-06 14:05:38 +0200 | [diff] [blame] | 111 | if (flag) |
| 112 | enable_interrupts(); |
| 113 | |
Wolfgang Denk | ad5bb45 | 2007-03-06 18:08:43 +0100 | [diff] [blame] | 114 | return ret; |
| 115 | } |
| 116 | |
| 117 | #endif |