wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 1 | /* |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 2 | * (C) Copyright 2001 |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 3 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| 4 | * |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 5 | * (C) Copyright 2001 |
| 6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 7 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 12 | #include <linux/byteorder/swab.h> |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 13 | |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 14 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 15 | flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 16 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 17 | /* Board support for 1 or 2 flash devices */ |
| 18 | #define FLASH_PORT_WIDTH32 |
| 19 | #undef FLASH_PORT_WIDTH16 |
| 20 | |
| 21 | #ifdef FLASH_PORT_WIDTH16 |
| 22 | #define FLASH_PORT_WIDTH ushort |
| 23 | #define FLASH_PORT_WIDTHV vu_short |
| 24 | #define SWAP(x) __swab16(x) |
| 25 | #else |
| 26 | #define FLASH_PORT_WIDTH ulong |
| 27 | #define FLASH_PORT_WIDTHV vu_long |
| 28 | #define SWAP(x) __swab32(x) |
| 29 | #endif |
| 30 | |
| 31 | #define FPW FLASH_PORT_WIDTH |
| 32 | #define FPWV FLASH_PORT_WIDTHV |
| 33 | |
| 34 | #define mb() __asm__ __volatile__ ("" : : : "memory") |
| 35 | |
| 36 | /*----------------------------------------------------------------------- |
| 37 | * Functions |
| 38 | */ |
| 39 | static ulong flash_get_size (FPW *addr, flash_info_t *info); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 40 | static int write_data (flash_info_t *info, ulong dest, FPW data); |
| 41 | static void flash_get_offsets (ulong base, flash_info_t *info); |
| 42 | void inline spin_wheel (void); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 43 | |
| 44 | /*----------------------------------------------------------------------- |
| 45 | */ |
| 46 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 47 | unsigned long flash_init (void) |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 48 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 49 | int i; |
| 50 | ulong size = 0; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 51 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 52 | for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 53 | switch (i) { |
| 54 | case 0: |
| 55 | flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); |
| 56 | flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); |
| 57 | break; |
| 58 | case 1: |
| 59 | flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]); |
| 60 | flash_get_offsets (PHYS_FLASH_2, &flash_info[i]); |
| 61 | break; |
| 62 | default: |
wdenk | 5f535fe | 2003-09-18 09:21:33 +0000 | [diff] [blame] | 63 | panic ("configured too many flash banks!\n"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 64 | break; |
| 65 | } |
| 66 | size += flash_info[i].size; |
| 67 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 68 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 69 | /* Protect monitor and environment sectors |
| 70 | */ |
| 71 | flash_protect ( FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 72 | CONFIG_SYS_FLASH_BASE, |
| 73 | CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 74 | &flash_info[0] ); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 75 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 76 | flash_protect ( FLAG_PROTECT_SET, |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 77 | CONFIG_ENV_ADDR, |
| 78 | CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] ); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 79 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 80 | return size; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 81 | } |
| 82 | |
| 83 | /*----------------------------------------------------------------------- |
| 84 | */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 85 | static void flash_get_offsets (ulong base, flash_info_t *info) |
| 86 | { |
| 87 | int i; |
| 88 | |
| 89 | if (info->flash_id == FLASH_UNKNOWN) { |
| 90 | return; |
| 91 | } |
| 92 | |
| 93 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { |
| 94 | for (i = 0; i < info->sector_count; i++) { |
| 95 | info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); |
| 96 | info->protect[i] = 0; |
| 97 | } |
| 98 | } |
| 99 | } |
| 100 | |
| 101 | /*----------------------------------------------------------------------- |
| 102 | */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 103 | void flash_print_info (flash_info_t *info) |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 104 | { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 105 | int i; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 106 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 107 | if (info->flash_id == FLASH_UNKNOWN) { |
| 108 | printf ("missing or unknown FLASH type\n"); |
| 109 | return; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 110 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 111 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 112 | switch (info->flash_id & FLASH_VENDMASK) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 113 | case FLASH_MAN_INTEL: |
| 114 | printf ("INTEL "); |
| 115 | break; |
| 116 | default: |
| 117 | printf ("Unknown Vendor "); |
| 118 | break; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | switch (info->flash_id & FLASH_TYPEMASK) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 122 | case FLASH_28F128J3A: |
| 123 | printf ("28F128J3A\n"); |
| 124 | break; |
| 125 | default: |
| 126 | printf ("Unknown Chip Type\n"); |
| 127 | break; |
| 128 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 129 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 130 | printf (" Size: %ld MB in %d Sectors\n", |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 131 | info->size >> 20, info->sector_count); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 132 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 133 | printf (" Sector Start Addresses:"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 134 | for (i = 0; i < info->sector_count; ++i) { |
| 135 | if ((i % 5) == 0) |
| 136 | printf ("\n "); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 137 | printf (" %08lX%s", |
| 138 | info->start[i], |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 139 | info->protect[i] ? " (RO)" : " "); |
| 140 | } |
| 141 | printf ("\n"); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 142 | return; |
| 143 | } |
| 144 | |
| 145 | /* |
| 146 | * The following code cannot be run from FLASH! |
| 147 | */ |
| 148 | static ulong flash_get_size (FPW *addr, flash_info_t *info) |
| 149 | { |
| 150 | volatile FPW value; |
| 151 | |
| 152 | /* Write auto select command: read Manufacturer ID */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 153 | addr[0x5555] = (FPW) 0x00AA00AA; |
| 154 | addr[0x2AAA] = (FPW) 0x00550055; |
| 155 | addr[0x5555] = (FPW) 0x00900090; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 156 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 157 | mb (); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 158 | value = addr[0]; |
| 159 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 160 | switch (value) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 161 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 162 | case (FPW) INTEL_MANUFACT: |
| 163 | info->flash_id = FLASH_MAN_INTEL; |
| 164 | break; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 165 | |
| 166 | default: |
| 167 | info->flash_id = FLASH_UNKNOWN; |
| 168 | info->sector_count = 0; |
| 169 | info->size = 0; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 170 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
| 171 | return (0); /* no or unknown flash */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 172 | } |
| 173 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 174 | mb (); |
| 175 | value = addr[1]; /* device ID */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 176 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 177 | switch (value) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 178 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 179 | case (FPW) INTEL_ID_28F128J3A: |
| 180 | info->flash_id += FLASH_28F128J3A; |
| 181 | info->sector_count = 128; |
| 182 | info->size = 0x02000000; |
| 183 | break; /* => 16 MB */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 184 | |
| 185 | default: |
| 186 | info->flash_id = FLASH_UNKNOWN; |
| 187 | break; |
| 188 | } |
| 189 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 190 | if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 191 | printf ("** ERROR: sector count %d > max (%d) **\n", |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 192 | info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); |
| 193 | info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 194 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 195 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 196 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 197 | |
| 198 | return (info->size); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 199 | } |
| 200 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 201 | |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 202 | /*----------------------------------------------------------------------- |
| 203 | */ |
| 204 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 205 | int flash_erase (flash_info_t *info, int s_first, int s_last) |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 206 | { |
Anatolij Gustschin | 90729c0 | 2011-11-19 13:12:15 +0000 | [diff] [blame] | 207 | int prot, sect; |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 208 | ulong type, start; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 209 | int rcode = 0; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 210 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 211 | if ((s_first < 0) || (s_first > s_last)) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 212 | if (info->flash_id == FLASH_UNKNOWN) { |
| 213 | printf ("- missing\n"); |
| 214 | } else { |
| 215 | printf ("- no sectors to erase\n"); |
| 216 | } |
| 217 | return 1; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 218 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 219 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 220 | type = (info->flash_id & FLASH_VENDMASK); |
| 221 | if ((type != FLASH_MAN_INTEL)) { |
| 222 | printf ("Can't erase unknown flash type %08lx - aborted\n", |
| 223 | info->flash_id); |
| 224 | return 1; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 225 | } |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 226 | |
| 227 | prot = 0; |
| 228 | for (sect = s_first; sect <= s_last; ++sect) { |
| 229 | if (info->protect[sect]) { |
| 230 | prot++; |
| 231 | } |
| 232 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 233 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 234 | if (prot) { |
| 235 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 236 | prot); |
| 237 | } else { |
| 238 | printf ("\n"); |
| 239 | } |
| 240 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 241 | /* Disable interrupts which might cause a timeout here */ |
Anatolij Gustschin | 90729c0 | 2011-11-19 13:12:15 +0000 | [diff] [blame] | 242 | disable_interrupts(); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 243 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 244 | /* Start erase on unprotected sectors */ |
| 245 | for (sect = s_first; sect <= s_last; sect++) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 246 | if (info->protect[sect] == 0) { /* not protected */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 247 | FPWV *addr = (FPWV *) (info->start[sect]); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 248 | FPW status; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 249 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 250 | printf ("Erasing sector %2d ... ", sect); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 251 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 252 | /* arm simple, non interrupt dependent timer */ |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 253 | start = get_timer(0); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 254 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 255 | *addr = (FPW) 0x00500050; /* clear status register */ |
| 256 | *addr = (FPW) 0x00200020; /* erase setup */ |
| 257 | *addr = (FPW) 0x00D000D0; /* erase confirm */ |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 258 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 259 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 260 | if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 261 | printf ("Timeout\n"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 262 | *addr = (FPW) 0x00B000B0; /* suspend erase */ |
| 263 | *addr = (FPW) 0x00FF00FF; /* reset to read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 264 | rcode = 1; |
| 265 | break; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 266 | } |
| 267 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 268 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 269 | *addr = 0x00500050; /* clear status register cmd. */ |
| 270 | *addr = 0x00FF00FF; /* resest to read mode */ |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 271 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 272 | printf (" done\n"); |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 273 | } |
| 274 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 275 | return rcode; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 276 | } |
| 277 | |
| 278 | /*----------------------------------------------------------------------- |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 279 | * Copy memory to flash, returns: |
| 280 | * 0 - OK |
| 281 | * 1 - write timeout |
| 282 | * 2 - Flash not erased |
| 283 | * 4 - Flash not identified |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 284 | */ |
| 285 | |
| 286 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) |
| 287 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 288 | ulong cp, wp; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 289 | FPW data; |
| 290 | int count, i, l, rc, port_width; |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 291 | |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 292 | if (info->flash_id == FLASH_UNKNOWN) { |
| 293 | return 4; |
| 294 | } |
| 295 | /* get lower word aligned address */ |
| 296 | #ifdef FLASH_PORT_WIDTH16 |
| 297 | wp = (addr & ~1); |
| 298 | port_width = 2; |
| 299 | #else |
| 300 | wp = (addr & ~3); |
| 301 | port_width = 4; |
| 302 | #endif |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 303 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 304 | /* |
| 305 | * handle unaligned start bytes |
| 306 | */ |
| 307 | if ((l = addr - wp) != 0) { |
| 308 | data = 0; |
| 309 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
| 310 | data = (data << 8) | (*(uchar *) cp); |
| 311 | } |
| 312 | for (; i < port_width && cnt > 0; ++i) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 313 | data = (data << 8) | *src++; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 314 | --cnt; |
| 315 | ++cp; |
| 316 | } |
| 317 | for (; cnt == 0 && i < port_width; ++i, ++cp) { |
| 318 | data = (data << 8) | (*(uchar *) cp); |
| 319 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 320 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 321 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
| 322 | return (rc); |
| 323 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 324 | wp += port_width; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 325 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 326 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 327 | /* |
| 328 | * handle word aligned part |
| 329 | */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 330 | count = 0; |
| 331 | while (cnt >= port_width) { |
| 332 | data = 0; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 333 | for (i = 0; i < port_width; ++i) { |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 334 | data = (data << 8) | *src++; |
| 335 | } |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 336 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
| 337 | return (rc); |
| 338 | } |
| 339 | wp += port_width; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 340 | cnt -= port_width; |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 341 | if (count++ > 0x800) { |
| 342 | spin_wheel (); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 343 | count = 0; |
| 344 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 345 | } |
| 346 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 347 | if (cnt == 0) { |
| 348 | return (0); |
| 349 | } |
| 350 | |
| 351 | /* |
| 352 | * handle unaligned tail bytes |
| 353 | */ |
| 354 | data = 0; |
| 355 | for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { |
| 356 | data = (data << 8) | *src++; |
| 357 | --cnt; |
| 358 | } |
| 359 | for (; i < port_width; ++i, ++cp) { |
| 360 | data = (data << 8) | (*(uchar *) cp); |
| 361 | } |
| 362 | |
| 363 | return (write_data (info, wp, SWAP (data))); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 364 | } |
| 365 | |
| 366 | /*----------------------------------------------------------------------- |
| 367 | * Write a word or halfword to Flash, returns: |
| 368 | * 0 - OK |
| 369 | * 1 - write timeout |
| 370 | * 2 - Flash not erased |
| 371 | */ |
| 372 | static int write_data (flash_info_t *info, ulong dest, FPW data) |
| 373 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 374 | FPWV *addr = (FPWV *) dest; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 375 | ulong status; |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 376 | ulong start; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 377 | |
| 378 | /* Check if Flash is (sufficiently) erased */ |
| 379 | if ((*addr & data) != data) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 380 | printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 381 | return (2); |
| 382 | } |
| 383 | /* Disable interrupts which might cause a timeout here */ |
Anatolij Gustschin | 90729c0 | 2011-11-19 13:12:15 +0000 | [diff] [blame] | 384 | disable_interrupts(); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 385 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 386 | *addr = (FPW) 0x00400040; /* write setup */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 387 | *addr = data; |
| 388 | |
| 389 | /* arm simple, non interrupt dependent timer */ |
Graeme Russ | a60d1e5 | 2011-07-15 23:31:37 +0000 | [diff] [blame] | 390 | start = get_timer(0); |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 391 | |
| 392 | /* wait while polling the status register */ |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 393 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
Marek Vasut | c4f4c76 | 2011-08-20 14:24:49 +0200 | [diff] [blame] | 394 | if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 395 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 396 | return (1); |
| 397 | } |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 398 | } |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 399 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 400 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 401 | |
| 402 | return (0); |
wdenk | ea8015b | 2002-10-26 16:43:06 +0000 | [diff] [blame] | 403 | } |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 404 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 405 | void inline spin_wheel (void) |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 406 | { |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 407 | static int p = 0; |
| 408 | static char w[] = "\\/-"; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 409 | |
wdenk | 06d01db | 2003-03-14 20:47:52 +0000 | [diff] [blame] | 410 | printf ("\010%c", w[p]); |
| 411 | (++p == 3) ? (p = 0) : 0; |
wdenk | db2f721f | 2003-03-06 00:58:30 +0000 | [diff] [blame] | 412 | } |