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Peter Pearse160131b2007-05-09 11:41:58 +01001/*
2 * (C) Copyright 2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * Configuation settings for the SMN42 board from Siemens.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * If we are developing, we might want to start u-boot from ram
31 * so we MUST NOT initialize critical regs like mem-timing ...
32 */
Peter Pearse160131b2007-05-09 11:41:58 +010033#undef CONFIG_SKIP_LOWLEVEL_INIT
34#undef CONFIG_SKIP_RELOCATE_UBOOT
35
36/*
37 * High Level Configuration Options
38 * (easy to change)
39 */
40#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
41#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
42#define CONFIG_LPC2292
Wolfgang Denk725671c2007-06-06 16:26:56 +020043#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
Peter Pearse160131b2007-05-09 11:41:58 +010044
45#undef CONFIG_USE_IRQ /* don't need them anymore */
46
47/*
48 * Size of malloc() pool
49 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
51#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
Peter Pearse160131b2007-05-09 11:41:58 +010052
53/*
54 * Hardware drivers
55 */
56
57/*
58 * select serial console configuration
59 */
Jean-Christophe PLAGNIOL-VILLARD6790c552009-03-29 23:01:42 +020060#define CONFIG_LPC2292_SERIAL
Peter Pearse160131b2007-05-09 11:41:58 +010061#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
62
63/* allow to overwrite serial and ethaddr */
64#define CONFIG_ENV_OVERWRITE
65
66#define CONFIG_BAUDRATE 115200
67
Jon Loeliger18225e82007-07-09 21:31:24 -050068/*
69 * BOOTP options
70 */
71#define CONFIG_BOOTP_SUBNETMASK
72#define CONFIG_BOOTP_GATEWAY
73#define CONFIG_BOOTP_HOSTNAME
74#define CONFIG_BOOTP_BOOTPATH
75#define CONFIG_BOOTP_BOOTFILESIZE
76
Peter Pearse160131b2007-05-09 11:41:58 +010077
78/* enable I2C and select the hardware/software driver */
Wolfgang Denk725671c2007-06-06 16:26:56 +020079#undef CONFIG_HARD_I2C /* I2C with hardware support */
Peter Pearse160131b2007-05-09 11:41:58 +010080#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
81/* this would be 0xAE if E0, E1 and E2 were pulled high */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_I2C_SLAVE 0xA0
83#define CONFIG_SYS_I2C_EEPROM_ADDR (0xA0 >> 1)
84#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */
85#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */
86#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
Peter Pearse160131b2007-05-09 11:41:58 +010087/* not used but required by devices.c */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020088#define CONFIG_SYS_I2C_SPEED 10000
Peter Pearse160131b2007-05-09 11:41:58 +010089
90#ifdef CONFIG_SOFT_I2C
91/*
92 * Software (bit-bang) I2C driver configuration
93 */
94#define SCL 0x00000004 /* P0.2 */
95#define SDA 0x00000008 /* P0.3 */
96
97#define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0)
98#define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); }
99#define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); }
100#define I2C_DELAY { udelay(100); }
101#define I2C_ACTIVE { unsigned int i2ctmp; \
Wolfgang Denk725671c2007-06-06 16:26:56 +0200102 i2ctmp = GET32(IO0DIR); \
Peter Pearse160131b2007-05-09 11:41:58 +0100103 i2ctmp |= SDA; \
104 PUT32(IO0DIR, i2ctmp); }
105#define I2C_TRISTATE { unsigned int i2ctmp; \
Wolfgang Denk725671c2007-06-06 16:26:56 +0200106 i2ctmp = GET32(IO0DIR); \
Peter Pearse160131b2007-05-09 11:41:58 +0100107 i2ctmp &= ~SDA; \
108 PUT32(IO0DIR, i2ctmp); }
109#endif /* CONFIG_SOFT_I2C */
110
Jon Loeligerfe7f7822007-07-08 15:02:44 -0500111
Peter Pearse160131b2007-05-09 11:41:58 +0100112/*
Jon Loeligerfe7f7822007-07-08 15:02:44 -0500113 * Command line configuration.
Peter Pearse160131b2007-05-09 11:41:58 +0100114 */
Jon Loeligerfe7f7822007-07-08 15:02:44 -0500115#include <config_cmd_default.h>
116#define CONFIG_CMD_DHCP
117#define CONFIG_CMD_FAT
118#define CONFIG_CMD_MMC
119#define CONFIG_CMD_NET
120#define CONFIG_CMD_EEPROM
121#define CONFIG_CMD_PING
122
Peter Pearse160131b2007-05-09 11:41:58 +0100123
124#define CONFIG_DOS_PARTITION
125
Peter Pearse160131b2007-05-09 11:41:58 +0100126#define CONFIG_BOOTDELAY 5
127
128/*
129 * Miscellaneous configurable options
130 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_LONGHELP /* undef to save memory */
132#define CONFIG_SYS_PROMPT "SMN42 # " /* Monitor Command Prompt */
133#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
134#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
135#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
136#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Peter Pearse160131b2007-05-09 11:41:58 +0100137
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#define CONFIG_SYS_MEMTEST_START 0x81800000 /* memtest works on */
139#define CONFIG_SYS_MEMTEST_END 0x83000000 /* 24 MB in SRAM */
Peter Pearse160131b2007-05-09 11:41:58 +0100140
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
Wolfgang Denk725671c2007-06-06 16:26:56 +0200142 /* for uClinux img is here*/
Peter Pearse160131b2007-05-09 11:41:58 +0100143
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200144#define CONFIG_SYS_SYS_CLK_FREQ 58982400 /* Hz */
145#define CONFIG_SYS_HZ 2048 /* decrementer freq in Hz */
Peter Pearse160131b2007-05-09 11:41:58 +0100146
147 /* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
Peter Pearse160131b2007-05-09 11:41:58 +0100149
150/*-----------------------------------------------------------------------
151 * Stack sizes
152 *
153 * The stack sizes are set up in start.S using the settings below
154 */
155#define CONFIG_STACKSIZE (128*1024) /* regular stack */
156#ifdef CONFIG_USE_IRQ
157#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
158#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
159#endif
160
161/*-----------------------------------------------------------------------
162 * Physical Memory Map
163 */
164#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */
165#define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */
166#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */
167
168/* This is the external flash */
169#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
170#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
171
172/*-----------------------------------------------------------------------
173 * FLASH and environment organization
174 */
175
176/*
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177 * The first entry in CONFIG_SYS_FLASH_BANKS_LIST is a dummy, but it must be present.
Peter Pearse160131b2007-05-09 11:41:58 +0100178 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#define CONFIG_SYS_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 }
180#define CONFIG_SYS_FLASH_ADDR0 0x555
181#define CONFIG_SYS_FLASH_ADDR1 0x2AA
182#define CONFIG_SYS_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */
183#define CONFIG_SYS_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */
Peter Pearse160131b2007-05-09 11:41:58 +0100184
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
Peter Pearse160131b2007-05-09 11:41:58 +0100186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
Peter Pearse160131b2007-05-09 11:41:58 +0100188
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200189#define CONFIG_ENV_IS_IN_FLASH 1
Peter Pearse160131b2007-05-09 11:41:58 +0100190/* The Environment Sector is in the CPU-internal flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#define CONFIG_SYS_FLASH_BASE 0
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200192#define CONFIG_ENV_OFFSET 0x3C000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200194#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
Peter Pearse160131b2007-05-09 11:41:58 +0100195
196#define CONFIG_CMDLINE_TAG
197#define CONFIG_SETUP_MEMORY_TAGS
198#define CONFIG_INITRD_TAG
199#define CONFIG_MMC 1
200/* we use this ethernet chip */
201#define CONFIG_ENC28J60
202
203#endif /* __CONFIG_H */