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wdenkfe8c2802002-11-03 00:38:21 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Most of the following information was derived from the document
26 * "Information Technology - AT Attachment-3 Interface (ATA-3)"
27 * which can be found at:
28 * http://www.dt.wdc.com/ata/ata-3/ata3r5v.zip
29 * ftp://poctok.iae.nsk.su/pub/asm/Documents/IDE/ATA3R5V.ZIP
30 * ftp://ftp.fee.vutbr.cz/pub/doc/io/ata/ata-3/ata3r5v.zip
31 */
32
33#ifndef _ATA_H
34#define _ATA_H
35
36/* Register addressing depends on the hardware design; for instance,
37 * 8-bit (register) and 16-bit (data) accesses might use different
38 * address spaces. This is implemented by the following definitions.
39 */
wdenk9fd5e312003-12-07 23:55:12 +000040#ifndef CFG_ATA_STRIDE
41#define CFG_ATA_STRIDE 1
42#endif
wdenkfe8c2802002-11-03 00:38:21 +000043
wdenk9fd5e312003-12-07 23:55:12 +000044#define ATA_IO_DATA(x) (CFG_ATA_DATA_OFFSET+((x) * CFG_ATA_STRIDE))
45#define ATA_IO_REG(x) (CFG_ATA_REG_OFFSET +((x) * CFG_ATA_STRIDE))
46#define ATA_IO_ALT(x) (CFG_ATA_ALT_OFFSET +((x) * CFG_ATA_STRIDE))
wdenkfe8c2802002-11-03 00:38:21 +000047
48/*
49 * I/O Register Descriptions
50 */
51#define ATA_DATA_REG ATA_IO_DATA(0)
52#define ATA_ERROR_REG ATA_IO_REG(1)
53#define ATA_SECT_CNT ATA_IO_REG(2)
54#define ATA_SECT_NUM ATA_IO_REG(3)
55#define ATA_CYL_LOW ATA_IO_REG(4)
56#define ATA_CYL_HIGH ATA_IO_REG(5)
57#define ATA_DEV_HD ATA_IO_REG(6)
58#define ATA_COMMAND ATA_IO_REG(7)
wdenka522fa02004-01-04 22:51:12 +000059#define ATA_DATA_EVEN ATA_IO_REG(8)
60#define ATA_DATA_ODD ATA_IO_REG(9)
wdenkfe8c2802002-11-03 00:38:21 +000061#define ATA_STATUS ATA_COMMAND
62#define ATA_DEV_CTL ATA_IO_ALT(6)
63#define ATA_LBA_LOW ATA_SECT_NUM
64#define ATA_LBA_MID ATA_CYL_LOW
65#define ATA_LBA_HIGH ATA_CYL_HIGH
66#define ATA_LBA_SEL ATA_DEV_CTL
67
68/*
69 * Status register bits
70 */
71#define ATA_STAT_BUSY 0x80 /* Device Busy */
72#define ATA_STAT_READY 0x40 /* Device Ready */
73#define ATA_STAT_FAULT 0x20 /* Device Fault */
74#define ATA_STAT_SEEK 0x10 /* Device Seek Complete */
75#define ATA_STAT_DRQ 0x08 /* Data Request (ready) */
76#define ATA_STAT_CORR 0x04 /* Corrected Data Error */
77#define ATA_STAT_INDEX 0x02 /* Vendor specific */
78#define ATA_STAT_ERR 0x01 /* Error */
79
80/*
81 * Device / Head Register Bits
82 */
83#define ATA_DEVICE(x) ((x & 1)<<4)
84#define ATA_LBA 0xE0
85
mushtaq khan66d9dbe2007-04-20 14:23:02 +053086enum {
87 ATA_MAX_DEVICES = 1, /* per bus/port */
88 ATA_MAX_PRD = 256, /* we could make these 256/256 */
89 ATA_SECT_SIZE = 256, /*256 words per sector */
90
91 /* bits in ATA command block registers */
92 ATA_HOB = (1 << 7), /* LBA48 selector */
93 ATA_NIEN = (1 << 1), /* disable-irq flag */
Wolfgang Denk3162eb82007-05-15 23:38:05 +020094 /*ATA_LBA = (1 << 6), */ /* LBA28 selector */
mushtaq khan66d9dbe2007-04-20 14:23:02 +053095 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
96 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
97 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
98 ATA_BUSY = (1 << 7), /* BSY status bit */
99 ATA_DRDY = (1 << 6), /* device ready */
100 ATA_DF = (1 << 5), /* device fault */
101 ATA_DRQ = (1 << 3), /* data request i/o */
102 ATA_ERR = (1 << 0), /* have an error */
103 ATA_SRST = (1 << 2), /* software reset */
104 ATA_ABORTED = (1 << 2), /* command aborted */
105 /* ATA command block registers */
106 ATA_REG_DATA = 0x00,
107 ATA_REG_ERR = 0x01,
108 ATA_REG_NSECT = 0x02,
109 ATA_REG_LBAL = 0x03,
110 ATA_REG_LBAM = 0x04,
111 ATA_REG_LBAH = 0x05,
112 ATA_REG_DEVICE = 0x06,
113 ATA_REG_STATUS = 0x07,
114 ATA_PCI_CTL_OFS = 0x02,
115 /* and their aliases */
116 ATA_REG_FEATURE = ATA_REG_ERR,
117 ATA_REG_CMD = ATA_REG_STATUS,
118 ATA_REG_BYTEL = ATA_REG_LBAM,
119 ATA_REG_BYTEH = ATA_REG_LBAH,
120 ATA_REG_DEVSEL = ATA_REG_DEVICE,
121 ATA_REG_IRQ = ATA_REG_NSECT,
122
123 /* SETFEATURES stuff */
124 SETFEATURES_XFER = 0x03,
125 XFER_UDMA_7 = 0x47,
126 XFER_UDMA_6 = 0x46,
127 XFER_UDMA_5 = 0x45,
128 XFER_UDMA_4 = 0x44,
129 XFER_UDMA_3 = 0x43,
130 XFER_UDMA_2 = 0x42,
131 XFER_UDMA_1 = 0x41,
132 XFER_UDMA_0 = 0x40,
133 XFER_MW_DMA_2 = 0x22,
134 XFER_MW_DMA_1 = 0x21,
135 XFER_MW_DMA_0 = 0x20,
136 XFER_PIO_4 = 0x0C,
137 XFER_PIO_3 = 0x0B,
138 XFER_PIO_2 = 0x0A,
139 XFER_PIO_1 = 0x09,
140 XFER_PIO_0 = 0x08,
141 XFER_SW_DMA_2 = 0x12,
142 XFER_SW_DMA_1 = 0x11,
143 XFER_SW_DMA_0 = 0x10,
144 XFER_PIO_SLOW = 0x00
145};
wdenkfe8c2802002-11-03 00:38:21 +0000146/*
147 * ATA Commands (only mandatory commands listed here)
148 */
149#define ATA_CMD_READ 0x20 /* Read Sectors (with retries) */
150#define ATA_CMD_READN 0x21 /* Read Sectors ( no retries) */
151#define ATA_CMD_WRITE 0x30 /* Write Sectores (with retries)*/
152#define ATA_CMD_WRITEN 0x31 /* Write Sectors ( no retries)*/
153#define ATA_CMD_VRFY 0x40 /* Read Verify (with retries) */
154#define ATA_CMD_VRFYN 0x41 /* Read verify ( no retries) */
155#define ATA_CMD_SEEK 0x70 /* Seek */
156#define ATA_CMD_DIAG 0x90 /* Execute Device Diagnostic */
157#define ATA_CMD_INIT 0x91 /* Initialize Device Parameters */
158#define ATA_CMD_RD_MULT 0xC4 /* Read Multiple */
159#define ATA_CMD_WR_MULT 0xC5 /* Write Multiple */
160#define ATA_CMD_SETMULT 0xC6 /* Set Multiple Mode */
161#define ATA_CMD_RD_DMA 0xC8 /* Read DMA (with retries) */
162#define ATA_CMD_RD_DMAN 0xC9 /* Read DMS ( no retries) */
163#define ATA_CMD_WR_DMA 0xCA /* Write DMA (with retries) */
164#define ATA_CMD_WR_DMAN 0xCB /* Write DMA ( no retires) */
165#define ATA_CMD_IDENT 0xEC /* Identify Device */
166#define ATA_CMD_SETF 0xEF /* Set Features */
167#define ATA_CMD_CHK_PWR 0xE5 /* Check Power Mode */
168
wdenkc40b2952004-03-13 23:29:43 +0000169#define ATA_CMD_READ_EXT 0x24 /* Read Sectors (with retries) with 48bit addressing */
170#define ATA_CMD_WRITE_EXT 0x34 /* Write Sectores (with retries) with 48bit addressing */
171#define ATA_CMD_VRFY_EXT 0x42 /* Read Verify (with retries) with 48bit addressing */
172
wdenkfe8c2802002-11-03 00:38:21 +0000173/*
174 * ATAPI Commands
175 */
176#define ATAPI_CMD_IDENT 0xA1 /* Identify AT Atachment Packed Interface Device */
177#define ATAPI_CMD_PACKET 0xA0 /* Packed Command */
178
179
180#define ATAPI_CMD_INQUIRY 0x12
181#define ATAPI_CMD_REQ_SENSE 0x03
182#define ATAPI_CMD_READ_CAP 0x25
183#define ATAPI_CMD_START_STOP 0x1B
184#define ATAPI_CMD_READ_12 0xA8
185
186
187#define ATA_GET_ERR() inb(ATA_STATUS)
188#define ATA_GET_STAT() inb(ATA_STATUS)
189#define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
190#define ATA_BAD_R_STAT (ATA_STAT_BUSY | ATA_STAT_ERR)
191#define ATA_BAD_W_STAT (ATA_BAD_R_STAT | ATA_STAT_FAULT)
192#define ATA_BAD_STAT (ATA_BAD_R_STAT | ATA_STAT_DRQ)
193#define ATA_DRIVE_READY (ATA_READY_STAT | ATA_STAT_SEEK)
194#define ATA_DATA_READY (ATA_STAT_DRQ)
195
196#define ATA_BLOCKSIZE 512 /* bytes */
197#define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
198#define ATA_SECTORWORDS (512 / sizeof(unsigned long))
199
200#ifndef ATA_RESET_TIME
201#define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */
202#endif
203
204/* ------------------------------------------------------------------------- */
205
206/*
207 * structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
208 */
209typedef struct hd_driveid {
210 unsigned short config; /* lots of obsolete bit flags */
211 unsigned short cyls; /* "physical" cyls */
212 unsigned short reserved2; /* reserved (word 2) */
213 unsigned short heads; /* "physical" heads */
214 unsigned short track_bytes; /* unformatted bytes per track */
215 unsigned short sector_bytes; /* unformatted bytes per sector */
216 unsigned short sectors; /* "physical" sectors per track */
217 unsigned short vendor0; /* vendor unique */
218 unsigned short vendor1; /* vendor unique */
219 unsigned short vendor2; /* vendor unique */
220 unsigned char serial_no[20]; /* 0 = not_specified */
221 unsigned short buf_type;
222 unsigned short buf_size; /* 512 byte increments; 0 = not_specified */
223 unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */
224 unsigned char fw_rev[8]; /* 0 = not_specified */
225 unsigned char model[40]; /* 0 = not_specified */
226 unsigned char max_multsect; /* 0=not_implemented */
227 unsigned char vendor3; /* vendor unique */
228 unsigned short dword_io; /* 0=not_implemented; 1=implemented */
229 unsigned char vendor4; /* vendor unique */
230 unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
231 unsigned short reserved50; /* reserved (word 50) */
232 unsigned char vendor5; /* vendor unique */
233 unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */
234 unsigned char vendor6; /* vendor unique */
235 unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */
236 unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */
237 unsigned short cur_cyls; /* logical cylinders */
238 unsigned short cur_heads; /* logical heads */
239 unsigned short cur_sectors; /* logical sectors per track */
240 unsigned short cur_capacity0; /* logical total sectors on drive */
241 unsigned short cur_capacity1; /* (2 words, misaligned int) */
242 unsigned char multsect; /* current multiple sector count */
243 unsigned char multsect_valid; /* when (bit0==1) multsect is ok */
244 unsigned int lba_capacity; /* total number of sectors */
245 unsigned short dma_1word; /* single-word dma info */
246 unsigned short dma_mword; /* multiple-word dma info */
247 unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */
248 unsigned short eide_dma_min; /* min mword dma cycle time (ns) */
249 unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */
250 unsigned short eide_pio; /* min cycle time (ns), no IORDY */
251 unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */
252 unsigned short words69_70[2]; /* reserved words 69-70 */
253 unsigned short words71_74[4]; /* reserved words 71-74 */
254 unsigned short queue_depth; /* */
255 unsigned short words76_79[4]; /* reserved words 76-79 */
256 unsigned short major_rev_num; /* */
257 unsigned short minor_rev_num; /* */
258 unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */
wdenkc40b2952004-03-13 23:29:43 +0000259 unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/
wdenkfe8c2802002-11-03 00:38:21 +0000260 unsigned short cfsse; /* command set-feature supported extensions */
261 unsigned short cfs_enable_1; /* command set-feature enabled */
262 unsigned short cfs_enable_2; /* command set-feature enabled */
263 unsigned short csf_default; /* command set-feature default */
264 unsigned short dma_ultra; /* */
265 unsigned short word89; /* reserved (word 89) */
266 unsigned short word90; /* reserved (word 90) */
267 unsigned short CurAPMvalues; /* current APM values */
268 unsigned short word92; /* reserved (word 92) */
269 unsigned short hw_config; /* hardware config */
wdenkc40b2952004-03-13 23:29:43 +0000270 unsigned short words94_99[6];/* reserved words 94-99 */
wdenk42dfe7a2004-03-14 22:25:36 +0000271 /*unsigned long long lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */
wdenkc40b2952004-03-13 23:29:43 +0000272 unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */
273 unsigned short words104_125[22];/* reserved words 104-125 */
wdenkfe8c2802002-11-03 00:38:21 +0000274 unsigned short last_lun; /* reserved (word 126) */
275 unsigned short word127; /* reserved (word 127) */
276 unsigned short dlf; /* device lock function
277 * 15:9 reserved
278 * 8 security level 1:max 0:high
279 * 7:6 reserved
280 * 5 enhanced erase
281 * 4 expire
282 * 3 frozen
283 * 2 locked
284 * 1 en/disabled
285 * 0 capability
286 */
287 unsigned short csfo; /* current set features options
288 * 15:4 reserved
289 * 3 auto reassign
290 * 2 reverting
291 * 1 read-look-ahead
292 * 0 write cache
293 */
294 unsigned short words130_155[26];/* reserved vendor words 130-155 */
295 unsigned short word156;
296 unsigned short words157_159[3];/* reserved vendor words 157-159 */
297 unsigned short words160_255[95];/* reserved words 160-255 */
298} hd_driveid_t;
299
300
301/*
302 * PIO Mode Configuration
303 *
304 * See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
305 */
306
307typedef struct {
308 unsigned int t_setup; /* Setup Time in [ns] or clocks */
309 unsigned int t_length; /* Length Time in [ns] or clocks */
310 unsigned int t_hold; /* Hold Time in [ns] or clocks */
311}
312pio_config_t;
313
314#define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */
315
316/* ------------------------------------------------------------------------- */
317
318#endif /* _ATA_H */