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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Linus Walleije62b0082012-08-04 05:21:28 +00002/*
3 * (C) Copyright 2012
4 * Linaro
5 * Linus Walleij <linus.walleij@linaro.org>
6 * Common ARM Integrator configuration settings
Linus Walleije62b0082012-08-04 05:21:28 +00007 */
8
Linus Walleije62b0082012-08-04 05:21:28 +00009#define CONFIG_SYS_MEMTEST_START 0x100000
10#define CONFIG_SYS_MEMTEST_END 0x10000000
Linus Walleije62b0082012-08-04 05:21:28 +000011#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
12#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
Linus Walleije62b0082012-08-04 05:21:28 +000013#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
14
15#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
16#define CONFIG_SETUP_MEMORY_TAGS
Linus Walleije62b0082012-08-04 05:21:28 +000017
18/*
19 * There are various dependencies on the core module (CM) fitted
20 * Users should refer to their CM user guide
21 */
22#include "armcoremodule.h"
23
24/*
25 * Initialize and remap the core module, use SPD to detect memory size
26 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
27 * the core module has a CM_INIT register
28 * then the U-Boot initialisation code will
29 * e.g. ARM Boot Monitor or pre-loader is repeated once
30 * (to re-initialise any existing CM_INIT settings to safe values).
31 *
32 * This is usually not the desired behaviour since the platform
33 * will either reboot into the ARM monitor (or pre-loader)
34 * or continuously cycle thru it without U-Boot running,
35 * depending upon the setting of Integrator/CP switch S2-4.
36 *
37 * However it may be needed if Integrator/CP switch S2-1
38 * is set OFF to boot direct into U-Boot.
39 * In that case comment out the line below.
40 */
41#define CONFIG_CM_INIT
42#define CONFIG_CM_REMAP
43#define CONFIG_CM_SPD_DETECT
44
45/*
46 * The ARM boot monitor initializes the board.
47 * However, the default U-Boot code also performs the initialization.
48 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
49 * - see documentation supplied with board for details of how to choose the
50 * image to run at reset/power up
51 * e.g. whether the ARM Boot Monitor runs before U-Boot
52 */
53/* #define CONFIG_SKIP_LOWLEVEL_INIT */
54
55/*
56 * The ARM boot monitor does not relocate U-Boot.
57 * However, the default U-Boot code performs the relocation check,
58 * and may relocate the code if the memory map is changed.
59 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
60 */
61/* #define SKIP_CONFIG_RELOCATE_UBOOT */
62
Linus Walleije62b0082012-08-04 05:21:28 +000063/*
64 * Physical Memory Map
65 */
Linus Walleije62b0082012-08-04 05:21:28 +000066#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
67#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
68#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
69#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
70#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
71 CONFIG_SYS_INIT_RAM_SIZE - \
72 GENERATED_GBL_DATA_SIZE)
73#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
Linus Walleija7b00a72015-04-05 01:48:33 +020074
75/*
76 * FLASH and environment organization
77 * Top varies according to amount fitted
78 * Reserve top 4 blocks of flash
79 * - ARM Boot Monitor
80 * - Unused
81 * - SIB block
82 * - U-Boot environment
83 */
Linus Walleija7b00a72015-04-05 01:48:33 +020084#define CONFIG_SYS_FLASH_BASE 0x24000000
85#define CONFIG_SYS_MAX_FLASH_BANKS 1
86
87/* Timeout values in ticks */
88#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
89#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
Linus Walleija7b00a72015-04-05 01:48:33 +020090#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */