Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Hans de Goede | 51637af | 2015-02-04 12:14:56 +0100 | [diff] [blame] | 2 | /* |
| 3 | * DRAM init helper functions |
| 4 | * |
| 5 | * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com> |
Hans de Goede | 51637af | 2015-02-04 12:14:56 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Simon Glass | 1045315 | 2019-11-14 12:57:30 -0700 | [diff] [blame] | 9 | #include <time.h> |
Andre Przywara | 1ea4fac | 2016-05-12 12:14:41 +0100 | [diff] [blame] | 10 | #include <asm/barriers.h> |
Hans de Goede | 51637af | 2015-02-04 12:14:56 +0100 | [diff] [blame] | 11 | #include <asm/io.h> |
| 12 | #include <asm/arch/dram.h> |
| 13 | |
| 14 | /* |
| 15 | * Wait up to 1s for value to be set in given part of reg. |
| 16 | */ |
| 17 | void mctl_await_completion(u32 *reg, u32 mask, u32 val) |
| 18 | { |
| 19 | unsigned long tmo = timer_get_us() + 1000000; |
| 20 | |
| 21 | while ((readl(reg) & mask) != val) { |
| 22 | if (timer_get_us() > tmo) |
| 23 | panic("Timeout initialising DRAM\n"); |
| 24 | } |
| 25 | } |
| 26 | |
| 27 | /* |
| 28 | * Test if memory at offset offset matches memory at begin of DRAM |
| 29 | */ |
| 30 | bool mctl_mem_matches(u32 offset) |
| 31 | { |
| 32 | /* Try to write different values to RAM at two addresses */ |
| 33 | writel(0, CONFIG_SYS_SDRAM_BASE); |
Alexander Graf | 0ea5a04 | 2016-03-29 17:29:09 +0200 | [diff] [blame] | 34 | writel(0xaa55aa55, (ulong)CONFIG_SYS_SDRAM_BASE + offset); |
Tom Rini | a78cd86 | 2016-08-01 18:54:53 -0400 | [diff] [blame] | 35 | dsb(); |
Hans de Goede | 51637af | 2015-02-04 12:14:56 +0100 | [diff] [blame] | 36 | /* Check if the same value is actually observed when reading back */ |
| 37 | return readl(CONFIG_SYS_SDRAM_BASE) == |
Alexander Graf | 0ea5a04 | 2016-03-29 17:29:09 +0200 | [diff] [blame] | 38 | readl((ulong)CONFIG_SYS_SDRAM_BASE + offset); |
Hans de Goede | 51637af | 2015-02-04 12:14:56 +0100 | [diff] [blame] | 39 | } |