Patrick Delaunay | e07a86b | 2019-11-06 16:16:32 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR X11 |
Patrice Chotard | 46b1e54 | 2017-12-12 09:49:32 +0100 | [diff] [blame] | 2 | /* |
Patrice Chotard | 71dfd5f | 2019-02-18 22:54:35 +0100 | [diff] [blame] | 3 | * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> |
Patrice Chotard | 46b1e54 | 2017-12-12 09:49:32 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | #include "stm32f429.dtsi" |
| 8 | #include "stm32f429-pinctrl.dtsi" |
| 9 | #include <dt-bindings/input/input.h> |
| 10 | |
| 11 | / { |
| 12 | model = "STMicroelectronics STM32F429i-DISCO board"; |
| 13 | compatible = "st,stm32f429i-disco", "st,stm32f429"; |
| 14 | |
| 15 | chosen { |
| 16 | bootargs = "root=/dev/ram"; |
| 17 | stdout-path = "serial0:115200n8"; |
| 18 | }; |
| 19 | |
| 20 | memory { |
Patrick Delaunay | e07a86b | 2019-11-06 16:16:32 +0100 | [diff] [blame] | 21 | device_type = "memory"; |
Patrice Chotard | 46b1e54 | 2017-12-12 09:49:32 +0100 | [diff] [blame] | 22 | reg = <0x90000000 0x800000>; |
| 23 | }; |
| 24 | |
| 25 | aliases { |
| 26 | serial0 = &usart1; |
| 27 | }; |
| 28 | |
| 29 | leds { |
| 30 | compatible = "gpio-leds"; |
| 31 | red { |
| 32 | gpios = <&gpiog 14 0>; |
| 33 | }; |
| 34 | green { |
| 35 | gpios = <&gpiog 13 0>; |
| 36 | linux,default-trigger = "heartbeat"; |
| 37 | }; |
| 38 | }; |
| 39 | |
| 40 | gpio_keys { |
| 41 | compatible = "gpio-keys"; |
Patrice Chotard | 71dfd5f | 2019-02-18 22:54:35 +0100 | [diff] [blame] | 42 | #address-cells = <1>; |
Patrice Chotard | 46b1e54 | 2017-12-12 09:49:32 +0100 | [diff] [blame] | 43 | #size-cells = <0>; |
| 44 | autorepeat; |
| 45 | button@0 { |
| 46 | label = "User"; |
| 47 | linux,code = <KEY_HOME>; |
| 48 | gpios = <&gpioa 0 0>; |
| 49 | }; |
| 50 | }; |
| 51 | |
| 52 | /* This turns on vbus for otg for host mode (dwc2) */ |
| 53 | vcc5v_otg: vcc5v-otg-regulator { |
| 54 | compatible = "regulator-fixed"; |
| 55 | gpio = <&gpioc 4 0>; |
| 56 | regulator-name = "vcc5_host1"; |
| 57 | regulator-always-on; |
| 58 | }; |
| 59 | }; |
| 60 | |
| 61 | &clk_hse { |
| 62 | clock-frequency = <8000000>; |
| 63 | }; |
| 64 | |
| 65 | &crc { |
| 66 | status = "okay"; |
| 67 | }; |
| 68 | |
| 69 | &rtc { |
| 70 | assigned-clocks = <&rcc 1 CLK_RTC>; |
| 71 | assigned-clock-parents = <&rcc 1 CLK_LSI>; |
| 72 | status = "okay"; |
| 73 | }; |
| 74 | |
| 75 | &usart1 { |
| 76 | pinctrl-0 = <&usart1_pins_a>; |
| 77 | pinctrl-names = "default"; |
| 78 | status = "okay"; |
| 79 | }; |
| 80 | |
| 81 | &usbotg_hs { |
| 82 | compatible = "st,stm32f4x9-fsotg"; |
| 83 | dr_mode = "host"; |
| 84 | pinctrl-0 = <&usbotg_fs_pins_b>; |
| 85 | pinctrl-names = "default"; |
| 86 | status = "okay"; |
| 87 | }; |