blob: 705b3baa81cfbdc7eb532a59fb8ff5aad9e3990f [file] [log] [blame]
Dave Gerlachb6059dd2021-04-23 11:27:46 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
Neha Malcom Francis1bc527e82023-07-22 00:14:34 +05306#include "k3-am64x-binman.dtsi"
7
Dave Gerlachb6059dd2021-04-23 11:27:46 -05008/ {
9 chosen {
Roger Quadros01f573e2023-08-05 11:14:40 +030010 tick-timer = &main_timer0;
Dave Gerlachb6059dd2021-04-23 11:27:46 -050011 };
Roger Quadros01f573e2023-08-05 11:14:40 +030012};
13
14&main_timer0 {
Roger Quadros01f573e2023-08-05 11:14:40 +030015 clock-frequency = <200000000>;
Dave Gerlachb6059dd2021-04-23 11:27:46 -050016};
17
Aswath Govindraju1c8b4042021-06-04 22:00:37 +053018&usb0 {
19 dr_mode="peripheral";
Aswath Govindraju1c8b4042021-06-04 22:00:37 +053020};
21
Aswath Govindraju7ca1af62021-08-09 22:32:23 +053022&main_mmc1_pins_default {
Roger Quadrosc043ba92023-09-29 16:46:41 +030023 bootph-all;
Aswath Govindraju7ca1af62021-08-09 22:32:23 +053024};
25
Dave Gerlachb6059dd2021-04-23 11:27:46 -050026&sdhci0 {
Roger Quadrosc043ba92023-09-29 16:46:41 +030027 bootph-all;
Dave Gerlachb6059dd2021-04-23 11:27:46 -050028};
29
Roger Quadros398bd292023-09-29 16:46:42 +030030&main_mmc1_pins_default {
31 bootph-all;
32};
33
Roger Quadros398bd292023-09-29 16:46:42 +030034&inta_main_dmss {
35 bootph-all;
36};
37
Siddharth Vadapalli62be8082023-10-28 20:36:03 +030038&main_bcdma {
39 reg = <0x00 0x485c0100 0x00 0x100>,
40 <0x00 0x4c000000 0x00 0x20000>,
41 <0x00 0x4a820000 0x00 0x20000>,
42 <0x00 0x4aa40000 0x00 0x20000>,
43 <0x00 0x4bc00000 0x00 0x100000>,
44 <0x00 0x48600000 0x00 0x8000>,
45 <0x00 0x484a4000 0x00 0x2000>,
46 <0x00 0x484c2000 0x00 0x2000>;
47 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
48 "cfg", "tchan", "rchan";
49};
50
Roger Quadros398bd292023-09-29 16:46:42 +030051&main_pktdma {
Siddharth Vadapalli62be8082023-10-28 20:36:03 +030052 reg = <0x00 0x485c0000 0x00 0x100>,
53 <0x00 0x4a800000 0x00 0x20000>,
54 <0x00 0x4aa00000 0x00 0x40000>,
55 <0x00 0x4b800000 0x00 0x400000>,
56 <0x00 0x485e0000 0x00 0x20000>,
57 <0x00 0x484a0000 0x00 0x4000>,
58 <0x00 0x484c0000 0x00 0x2000>,
59 <0x00 0x48430000 0x00 0x4000>;
60 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg",
61 "tchan", "rchan", "rflow";
Roger Quadros398bd292023-09-29 16:46:42 +030062 bootph-all;
63};
64
Vignesh Raghavendrabc17fcc2021-05-10 20:06:12 +053065&cpsw_port2 {
66 status = "disabled";
67};
Jonathan Humphreysb9091c12024-02-23 18:17:02 -060068
69&ospi0_pins_default {
70 bootph-all;
71};
72
73&fss {
74 bootph-all;
75};
76
77&ospi0 {
78 bootph-all;
79
80 flash@0 {
81 bootph-all;
82 };
83};