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Allen Martinc037c932012-08-31 08:30:09 +00001/*
2 * (C) Copyright 2012
3 * NVIDIA Inc, <www.nvidia.com>
4 *
5 * Allen Martin <amartin@nvidia.com>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Allen Martinc037c932012-08-31 08:30:09 +00008 */
9#include <common.h>
Allen Martinb2f98932012-10-19 21:08:23 +000010#include <spl.h>
Allen Martinc037c932012-08-31 08:30:09 +000011
12#include <asm/io.h>
Allen Martinc037c932012-08-31 08:30:09 +000013#include <asm/arch/clock.h>
Allen Martinc037c932012-08-31 08:30:09 +000014#include <asm/arch/pinmux.h>
Tom Warren150c2492012-09-19 15:50:56 -070015#include <asm/arch/tegra.h>
Stephen Warren19ed7b42014-03-21 12:28:53 -060016#include <asm/arch-tegra/apb_misc.h>
Lucas Stach516f00b2012-09-29 10:02:08 +000017#include <asm/arch-tegra/board.h>
Masahiro Yamada9f2ec3f2014-04-23 21:20:43 +090018#include <asm/spl.h>
Tom Warren1b245fe2012-12-11 13:34:13 +000019#include "cpu.h"
Allen Martinc037c932012-08-31 08:30:09 +000020
Allen Martinb2f98932012-10-19 21:08:23 +000021void spl_board_init(void)
Allen Martinc037c932012-08-31 08:30:09 +000022{
Stephen Warren19ed7b42014-03-21 12:28:53 -060023 struct apb_misc_pp_ctlr *apb_misc =
24 (struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE;
Allen Martinc037c932012-08-31 08:30:09 +000025
26 /* enable JTAG */
Stephen Warren19ed7b42014-03-21 12:28:53 -060027 writel(0xC0, &apb_misc->cfg_ctl);
Allen Martinc037c932012-08-31 08:30:09 +000028
Allen Martinb2f98932012-10-19 21:08:23 +000029 board_init_uart_f();
Allen Martinc037c932012-08-31 08:30:09 +000030
Allen Martinb2f98932012-10-19 21:08:23 +000031 /* Initialize periph GPIOs */
32 gpio_early_init_uart();
Allen Martinc037c932012-08-31 08:30:09 +000033
34 clock_early_init();
Allen Martinc037c932012-08-31 08:30:09 +000035 preloader_console_init();
Allen Martinc037c932012-08-31 08:30:09 +000036}
37
Allen Martinb2f98932012-10-19 21:08:23 +000038u32 spl_boot_device(void)
Allen Martinc037c932012-08-31 08:30:09 +000039{
Allen Martinb2f98932012-10-19 21:08:23 +000040 return BOOT_DEVICE_RAM;
41}
42
43void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
44{
Andre Przywara11e14792017-01-02 11:48:31 +000045 debug("image entry point: 0x%lX\n", spl_image->entry_point);
Allen Martinb2f98932012-10-19 21:08:23 +000046
47 start_cpu((u32)spl_image->entry_point);
48 halt_avp();
Allen Martinc037c932012-08-31 08:30:09 +000049}