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Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR X11
Stefan Agnere60f7492016-10-05 15:27:06 -07002/*
Stefan Agnerd8a32f52019-01-08 12:42:29 +01003 * Copyright 2016-2019 Toradex AG
Stefan Agnere60f7492016-10-05 15:27:06 -07004 */
5
6/dts-v1/;
7#include <dt-bindings/gpio/gpio.h>
Peng Fan993274f2017-04-13 14:09:49 +08008#include "imx7d.dtsi"
Stefan Agnere60f7492016-10-05 15:27:06 -07009
Stefan Agnere60f7492016-10-05 15:27:06 -070010&i2c1 {
11 pinctrl-names = "default", "gpio";
12 pinctrl-0 = <&pinctrl_i2c1>;
13 pinctrl-1 = <&pinctrl_i2c1_gpio>;
14 sda-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
15 scl-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
16 status = "okay";
Stefan Agnercced7e52016-10-05 15:27:10 -070017
18 rn5t567@33 {
19 compatible = "ricoh,rn5t567";
20 reg = <0x33>;
21 };
Stefan Agnere60f7492016-10-05 15:27:06 -070022};
23
24&i2c4 {
25 pinctrl-names = "default", "gpio";
26 pinctrl-0 = <&pinctrl_i2c4>;
27 pinctrl-1 = <&pinctrl_i2c4_gpio>;
28 sda-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
29 scl-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
30 status = "okay";
31};
32
33&uart1 {
34 pinctrl-names = "default";
35 pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1>;
36 uart-has-rtscts;
37 fsl,dte-mode;
38 status = "okay";
39};
40
41&iomuxc {
42 pinctrl_i2c4: i2c4-grp {
43 fsl,pins = <
44 MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f
45 MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f
46 >;
47 };
48
49 pinctrl_i2c4_gpio: i2c4-gpio-grp {
50 fsl,pins = <
51 MX7D_PAD_ENET1_RGMII_TD3__GPIO7_IO9 0x4000007f
52 MX7D_PAD_ENET1_RGMII_TD2__GPIO7_IO8 0x4000007f
53 >;
54 };
55
56 pinctrl_uart1: uart1-grp {
57 fsl,pins = <
58 MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79
59 MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79
60 MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79
61 MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79
62 >;
63 };
64
65 pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
66 fsl,pins = <
67 MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */
68 MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */
69 >;
70 };
71};
72
73&iomuxc_lpsr {
74 pinctrl_i2c1: i2c1-grp {
75 fsl,pins = <
Peng Fan993274f2017-04-13 14:09:49 +080076 MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f
77 MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f
Stefan Agnere60f7492016-10-05 15:27:06 -070078 >;
79 };
80
81 pinctrl_i2c1_gpio: i2c1-gpio-grp {
82 fsl,pins = <
Peng Fan993274f2017-04-13 14:09:49 +080083 MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x4000007f
84 MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x4000007f
Stefan Agnere60f7492016-10-05 15:27:06 -070085 >;
86 };
87};