blob: d969b008775eb2ec08aa949559bb7bc0a0e58ff2 [file] [log] [blame]
David Bauerb821e0d2021-01-07 00:06:11 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
4 * (C) Copyright 2020 David Bauer
5 */
6
7#include "rk3328-u-boot.dtsi"
8#include "rk3328-sdram-ddr4-666.dtsi"
David Bauerb821e0d2021-01-07 00:06:11 +01009
10&gpio0 {
Simon Glass8c103c32023-02-13 08:56:33 -070011 bootph-pre-ram;
David Bauerb821e0d2021-01-07 00:06:11 +010012};
13
14&pinctrl {
Simon Glass8c103c32023-02-13 08:56:33 -070015 bootph-pre-ram;
David Bauerb821e0d2021-01-07 00:06:11 +010016};
17
Peter Robinson27e1b5e2021-07-22 16:20:43 +010018&sdmmc0m1_pin {
Simon Glass8c103c32023-02-13 08:56:33 -070019 bootph-pre-ram;
David Bauerb821e0d2021-01-07 00:06:11 +010020};
21
22&pcfg_pull_up_4ma {
Simon Glass8c103c32023-02-13 08:56:33 -070023 bootph-pre-ram;
David Bauerb821e0d2021-01-07 00:06:11 +010024};
25
26/* Need this and all the pinctrl/gpio stuff above to set pinmux */
27&vcc_sd {
Simon Glass8c103c32023-02-13 08:56:33 -070028 bootph-pre-ram;
David Bauerb821e0d2021-01-07 00:06:11 +010029};
30
31&gmac2io {
32 snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
33 snps,reset-active-low;
34 snps,reset-delays-us = <0 10000 50000>;
35};