Yanhong Wang | 5ecf9b0 | 2023-03-29 11:42:17 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2022 StarFive Technology Co., Ltd. |
| 4 | * Author: Yanhong Wang<yanhong.wang@starfivetech.com> |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Yanhong Wang | 5ecf9b0 | 2023-03-29 11:42:17 +0800 | [diff] [blame] | 8 | #include <cpu_func.h> |
Yanhong Wang | 99f3a43 | 2023-06-15 17:36:50 +0800 | [diff] [blame] | 9 | #include <dm.h> |
Shengyu Qu | 4317770 | 2023-09-17 03:36:33 +0800 | [diff] [blame] | 10 | #include <fdt_support.h> |
Heinrich Schuchardt | 16dbe3d | 2023-09-07 13:21:28 +0200 | [diff] [blame] | 11 | #include <env.h> |
| 12 | #include <asm/arch/eeprom.h> |
| 13 | #include <asm/io.h> |
| 14 | #include <asm/sections.h> |
Yanhong Wang | 5ecf9b0 | 2023-03-29 11:42:17 +0800 | [diff] [blame] | 15 | #include <linux/bitops.h> |
| 16 | |
Shengyu Qu | 4317770 | 2023-09-17 03:36:33 +0800 | [diff] [blame] | 17 | DECLARE_GLOBAL_DATA_PTR; |
Yanhong Wang | 5ecf9b0 | 2023-03-29 11:42:17 +0800 | [diff] [blame] | 18 | #define JH7110_L2_PREFETCHER_BASE_ADDR 0x2030000 |
| 19 | #define JH7110_L2_PREFETCHER_HART_OFFSET 0x2000 |
Heinrich Schuchardt | 16dbe3d | 2023-09-07 13:21:28 +0200 | [diff] [blame] | 20 | #define FDTFILE_VISIONFIVE2_1_2A \ |
| 21 | "starfive/jh7110-starfive-visionfive-2-v1.2a.dtb" |
| 22 | #define FDTFILE_VISIONFIVE2_1_3B \ |
| 23 | "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb" |
Yanhong Wang | 5ecf9b0 | 2023-03-29 11:42:17 +0800 | [diff] [blame] | 24 | |
| 25 | /* enable U74-mc hart1~hart4 prefetcher */ |
| 26 | static void enable_prefetcher(void) |
| 27 | { |
| 28 | u8 hart; |
| 29 | u32 *reg; |
| 30 | |
| 31 | /* JH7110 use U74MC CORE IP, it include five cores(one S7 and four U7), |
| 32 | * but only U7 cores support prefetcher configuration |
| 33 | */ |
| 34 | for (hart = 1; hart < 5; hart++) { |
| 35 | reg = (void *)(u64)(JH7110_L2_PREFETCHER_BASE_ADDR |
| 36 | + hart * JH7110_L2_PREFETCHER_HART_OFFSET); |
| 37 | |
| 38 | mb(); /* memory barrier */ |
| 39 | setbits_le32(reg, 0x1); |
| 40 | mb(); /* memory barrier */ |
| 41 | } |
| 42 | } |
| 43 | |
Heinrich Schuchardt | 16dbe3d | 2023-09-07 13:21:28 +0200 | [diff] [blame] | 44 | /** |
| 45 | * set_fdtfile() - set the $fdtfile variable based on the board revision |
| 46 | */ |
| 47 | static void set_fdtfile(void) |
| 48 | { |
| 49 | u8 version; |
| 50 | const char *fdtfile; |
| 51 | |
| 52 | version = get_pcb_revision_from_eeprom(); |
| 53 | switch (version) { |
| 54 | case 'a': |
| 55 | case 'A': |
| 56 | fdtfile = FDTFILE_VISIONFIVE2_1_2A; |
| 57 | break; |
| 58 | |
| 59 | case 'b': |
| 60 | case 'B': |
| 61 | default: |
| 62 | fdtfile = FDTFILE_VISIONFIVE2_1_3B; |
| 63 | break; |
| 64 | }; |
| 65 | |
| 66 | env_set("fdtfile", fdtfile); |
| 67 | } |
| 68 | |
Yanhong Wang | 5ecf9b0 | 2023-03-29 11:42:17 +0800 | [diff] [blame] | 69 | int board_init(void) |
| 70 | { |
| 71 | enable_caches(); |
| 72 | enable_prefetcher(); |
| 73 | |
| 74 | return 0; |
| 75 | } |
Yanhong Wang | 99f3a43 | 2023-06-15 17:36:50 +0800 | [diff] [blame] | 76 | |
Heinrich Schuchardt | 16dbe3d | 2023-09-07 13:21:28 +0200 | [diff] [blame] | 77 | int board_late_init(void) |
| 78 | { |
| 79 | if (CONFIG_IS_ENABLED(ID_EEPROM)) |
| 80 | set_fdtfile(); |
| 81 | |
| 82 | return 0; |
| 83 | } |
| 84 | |
Yanhong Wang | 99f3a43 | 2023-06-15 17:36:50 +0800 | [diff] [blame] | 85 | void *board_fdt_blob_setup(int *err) |
| 86 | { |
| 87 | *err = 0; |
| 88 | if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) { |
| 89 | if (gd->arch.firmware_fdt_addr) |
| 90 | return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr; |
| 91 | } |
| 92 | |
Shiji Yang | ccea96f | 2023-08-03 09:47:17 +0800 | [diff] [blame] | 93 | return (ulong *)_end; |
Yanhong Wang | 99f3a43 | 2023-06-15 17:36:50 +0800 | [diff] [blame] | 94 | } |
Shengyu Qu | 4317770 | 2023-09-17 03:36:33 +0800 | [diff] [blame] | 95 | |
| 96 | int ft_board_setup(void *blob, struct bd_info *bd) |
| 97 | { |
| 98 | return fdt_fixup_memory(blob, 0x40000000, gd->ram_size); |
| 99 | } |