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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / da77a787ff3083ba64f848c5957fe7d4afe93508 / . / arch / arm / dts / meson-g12b.dtsi
blob: 9b8548e5f6e51194bff5929281f15491df42b69a [file] [log] [blame]
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]7#include "meson-g12.dtsi"
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]8
9/ {
10 compatible = "amlogic,g12b";
11
12 cpus {
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]13 #address-cells = <0x2>;
14 #size-cells = <0x0>;
15
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]16 cpu-map {
17 cluster0 {
18 core0 {
19 cpu = <&cpu0>;
20 };
21
22 core1 {
23 cpu = <&cpu1>;
24 };
25 };
26
27 cluster1 {
28 core0 {
29 cpu = <&cpu100>;
30 };
31
32 core1 {
33 cpu = <&cpu101>;
34 };
35
36 core2 {
37 cpu = <&cpu102>;
38 };
39
40 core3 {
41 cpu = <&cpu103>;
42 };
43 };
44 };
45
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]46 cpu0: cpu@0 {
47 device_type = "cpu";
48 compatible = "arm,cortex-a53";
49 reg = <0x0 0x0>;
50 enable-method = "psci";
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]51 capacity-dmips-mhz = <592>;
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]52 next-level-cache = <&l2>;
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]53 #cooling-cells = <2>;
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]54 };
55
56 cpu1: cpu@1 {
57 device_type = "cpu";
58 compatible = "arm,cortex-a53";
59 reg = <0x0 0x1>;
60 enable-method = "psci";
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]61 capacity-dmips-mhz = <592>;
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]62 next-level-cache = <&l2>;
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]63 #cooling-cells = <2>;
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]64 };
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]65
66 cpu100: cpu@100 {
67 device_type = "cpu";
68 compatible = "arm,cortex-a73";
69 reg = <0x0 0x100>;
70 enable-method = "psci";
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]71 capacity-dmips-mhz = <1024>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]72 next-level-cache = <&l2>;
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]73 #cooling-cells = <2>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]74 };
75
76 cpu101: cpu@101 {
77 device_type = "cpu";
78 compatible = "arm,cortex-a73";
79 reg = <0x0 0x101>;
80 enable-method = "psci";
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]81 capacity-dmips-mhz = <1024>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]82 next-level-cache = <&l2>;
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]83 #cooling-cells = <2>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]84 };
85
86 cpu102: cpu@102 {
87 device_type = "cpu";
88 compatible = "arm,cortex-a73";
89 reg = <0x0 0x102>;
90 enable-method = "psci";
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]91 capacity-dmips-mhz = <1024>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]92 next-level-cache = <&l2>;
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]93 #cooling-cells = <2>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]94 };
95
96 cpu103: cpu@103 {
97 device_type = "cpu";
98 compatible = "arm,cortex-a73";
99 reg = <0x0 0x103>;
100 enable-method = "psci";
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]101 capacity-dmips-mhz = <1024>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]102 next-level-cache = <&l2>;
Jerome Brunetdd5f2352020-03-05 12:12:38 +0100[diff] [blame]103 #cooling-cells = <2>;
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]104 };
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]105
106 l2: l2-cache0 {
107 compatible = "cache";
108 };
Neil Armstrong0d84acb2019-07-22 11:27:59 +0200[diff] [blame]109 };
110};
111
112&clkc {
113 compatible = "amlogic,g12b-clkc";
114};
Andreas Färber1a87cc72019-10-09 16:03:54 +0200[diff] [blame]115
Christian Hewittda77a7872020-04-24 02:58:30 +0000[diff] [blame^]116&cpu_thermal {
117 cooling-maps {
118 map0 {
119 trip = <&cpu_passive>;
120 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
121 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
122 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
123 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
124 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
125 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
126 };
127 map1 {
128 trip = <&cpu_hot>;
129 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
130 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
131 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
132 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
133 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
134 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
135 };
136 };
137};