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Stelian Popd99a8ff2008-05-08 20:52:22 +02001/*
2 * (C) Copyright 2007-2008
Stelian Popc9e798d2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Stelian Popd99a8ff2008-05-08 20:52:22 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/* ARM asynchronous clock */
Xu, Hongf7aea462011-07-31 22:49:00 +000031#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
Achim Ehrlich7c966a82010-02-24 10:29:16 +010032#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
Xu, Hongf7aea462011-07-31 22:49:00 +000033#define CONFIG_SYS_HZ 1000
Stelian Popd99a8ff2008-05-08 20:52:22 +020034
Xu, Hongf7aea462011-07-31 22:49:00 +000035#ifdef CONFIG_AT91SAM9G10
36#define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020037#else
Xu, Hongf7aea462011-07-31 22:49:00 +000038#define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020039#endif
Xu, Hongf7aea462011-07-31 22:49:00 +000040
41#include <asm/hardware.h>
42
Xu, Hongf7aea462011-07-31 22:49:00 +000043#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
44#define CONFIG_SETUP_MEMORY_TAGS
45#define CONFIG_INITRD_TAG
Stelian Popd99a8ff2008-05-08 20:52:22 +020046
47#define CONFIG_SKIP_LOWLEVEL_INIT
Stelian Popd99a8ff2008-05-08 20:52:22 +020048
Xu, Hongf7aea462011-07-31 22:49:00 +000049#define CONFIG_DISPLAY_CPUINFO
50
51#define CONFIG_ATMEL_LEGACY
52#define CONFIG_SYS_TEXT_BASE 0x21f00000
53
Stelian Popd99a8ff2008-05-08 20:52:22 +020054/*
55 * Hardware drivers
56 */
Xu, Hongf7aea462011-07-31 22:49:00 +000057
58/* gpio */
59#define CONFIG_AT91_GPIO
60#define CONFIG_AT91_GPIO_PULLUP 1
61
62/* serial console */
63#define CONFIG_ATMEL_USART
64#define CONFIG_USART_BASE ATMEL_BASE_DBGU
65#define CONFIG_USART_ID ATMEL_ID_SYS
66#define CONFIG_BAUDRATE 115200
Stelian Popd99a8ff2008-05-08 20:52:22 +020067
Stelian Pop820f2a92008-05-08 14:52:30 +020068/* LCD */
Xu, Hongf7aea462011-07-31 22:49:00 +000069#define CONFIG_LCD
Stelian Pop820f2a92008-05-08 14:52:30 +020070#define LCD_BPP LCD_COLOR8
Xu, Hongf7aea462011-07-31 22:49:00 +000071#define CONFIG_LCD_LOGO
Stelian Pop820f2a92008-05-08 14:52:30 +020072#undef LCD_TEST_PATTERN
Xu, Hongf7aea462011-07-31 22:49:00 +000073#define CONFIG_LCD_INFO
74#define CONFIG_LCD_INFO_BELOW_LOGO
75#define CONFIG_SYS_WHITE_ON_BLACK
76#define CONFIG_ATMEL_LCD
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020077#ifdef CONFIG_AT91SAM9261EK
Xu, Hongf7aea462011-07-31 22:49:00 +000078#define CONFIG_ATMEL_LCD_BGR555
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020079#endif
Xu, Hongf7aea462011-07-31 22:49:00 +000080
81#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Stelian Pop820f2a92008-05-08 14:52:30 +020082
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010083/* LED */
84#define CONFIG_AT91_LED
85#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
86#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
87#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
88
Stelian Popd99a8ff2008-05-08 20:52:22 +020089#define CONFIG_BOOTDELAY 3
90
Stelian Popd99a8ff2008-05-08 20:52:22 +020091/*
92 * BOOTP options
93 */
Xu, Hongf7aea462011-07-31 22:49:00 +000094#define CONFIG_BOOTP_BOOTFILESIZE
95#define CONFIG_BOOTP_BOOTPATH
96#define CONFIG_BOOTP_GATEWAY
97#define CONFIG_BOOTP_HOSTNAME
Stelian Popd99a8ff2008-05-08 20:52:22 +020098
99/*
100 * Command line configuration.
101 */
102#include <config_cmd_default.h>
103#undef CONFIG_CMD_BDI
Stelian Popd99a8ff2008-05-08 20:52:22 +0200104#undef CONFIG_CMD_FPGA
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200105#undef CONFIG_CMD_IMI
Stelian Popd99a8ff2008-05-08 20:52:22 +0200106#undef CONFIG_CMD_IMLS
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200107#undef CONFIG_CMD_LOADS
108#undef CONFIG_CMD_SOURCE
Stelian Popd99a8ff2008-05-08 20:52:22 +0200109
Xu, Hongf7aea462011-07-31 22:49:00 +0000110#define CONFIG_CMD_PING
111#define CONFIG_CMD_DHCP
112#define CONFIG_CMD_NAND
113#define CONFIG_CMD_USB
Stelian Popd99a8ff2008-05-08 20:52:22 +0200114
115/* SDRAM */
116#define CONFIG_NR_DRAM_BANKS 1
Xu, Hongf7aea462011-07-31 22:49:00 +0000117#define CONFIG_SYS_SDRAM_BASE 0x20000000
118#define CONFIG_SYS_SDRAM_SIZE 0x04000000
119#define CONFIG_SYS_INIT_SP_ADDR \
120 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
Stelian Popd99a8ff2008-05-08 20:52:22 +0200121
122/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARD4758ebd2009-03-27 23:26:44 +0100123#define CONFIG_ATMEL_DATAFLASH_SPI
Xu, Hongf7aea462011-07-31 22:49:00 +0000124#define CONFIG_HAS_DATAFLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200125#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
126#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
127#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
128#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
Xu, Hongf7aea462011-07-31 22:49:00 +0000129#define AT91_SPI_CLK 15000000
130#define DATAFLASH_TCSS (0x1a << 16)
131#define DATAFLASH_TCHS (0x1 << 24)
Stelian Popd99a8ff2008-05-08 20:52:22 +0200132
133/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100134#ifdef CONFIG_CMD_NAND
135#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200136#define CONFIG_SYS_MAX_NAND_DEVICE 1
137#define CONFIG_SYS_NAND_BASE 0x40000000
Xu, Hongf7aea462011-07-31 22:49:00 +0000138#define CONFIG_SYS_NAND_DBW_8
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100139/* our ALE is AD22 */
140#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
141/* our CLE is AD21 */
142#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
143#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
144#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
Wolfgang Denk2eb99ca2009-07-18 21:52:24 +0200145
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100146#endif
Stelian Popd99a8ff2008-05-08 20:52:22 +0200147
148/* NOR flash - no real flash on this board */
Xu, Hongf7aea462011-07-31 22:49:00 +0000149#define CONFIG_SYS_NO_FLASH
Stelian Popd99a8ff2008-05-08 20:52:22 +0200150
151/* Ethernet */
Xu, Hongf7aea462011-07-31 22:49:00 +0000152#define CONFIG_DRIVER_DM9000
Stelian Popd99a8ff2008-05-08 20:52:22 +0200153#define CONFIG_DM9000_BASE 0x30000000
154#define DM9000_IO CONFIG_DM9000_BASE
155#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
Xu, Hongf7aea462011-07-31 22:49:00 +0000156#define CONFIG_DM9000_USE_16BIT
157#define CONFIG_DM9000_NO_SROM
Stelian Popd99a8ff2008-05-08 20:52:22 +0200158#define CONFIG_NET_RETRY_COUNT 20
Xu, Hongf7aea462011-07-31 22:49:00 +0000159#define CONFIG_RESET_PHY_R
Stelian Popd99a8ff2008-05-08 20:52:22 +0200160
161/* USB */
Jean-Christophe PLAGNIOL-VILLARD2b7178a2009-03-27 23:26:44 +0100162#define CONFIG_USB_ATMEL
Xu, Hongf7aea462011-07-31 22:49:00 +0000163#define CONFIG_USB_OHCI_NEW
164#define CONFIG_DOS_PARTITION
165#define CONFIG_SYS_USB_OHCI_CPU_INIT
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +0200167#ifdef CONFIG_AT91SAM9G10EK
168#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
169#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200170#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +0200171#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200172#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Xu, Hongf7aea462011-07-31 22:49:00 +0000173#define CONFIG_USB_STORAGE
174#define CONFIG_CMD_FAT
Stelian Popd99a8ff2008-05-08 20:52:22 +0200175
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200177
Xu, Hongf7aea462011-07-31 22:49:00 +0000178#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Popd99a8ff2008-05-08 20:52:22 +0200180
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
Stelian Popd99a8ff2008-05-08 20:52:22 +0200182
183/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Xu, Hongf7aea462011-07-31 22:49:00 +0000184#define CONFIG_ENV_IS_IN_DATAFLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100186#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200188#define CONFIG_ENV_SIZE 0x4200
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000189#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
Stelian Popd99a8ff2008-05-08 20:52:22 +0200190#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
191 "root=/dev/mtdblock0 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200192 "mtdparts=atmel_nand:-(root) " \
Stelian Popd99a8ff2008-05-08 20:52:22 +0200193 "rw rootfstype=jffs2"
194
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100195#elif CONFIG_SYS_USE_DATAFLASH_CS3
196
197/* bootstrap + u-boot + env + linux in dataflash on CS3 */
Xu, Hongf7aea462011-07-31 22:49:00 +0000198#define CONFIG_ENV_IS_IN_DATAFLASH
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100199#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
200#define CONFIG_ENV_OFFSET 0x4200
201#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
202#define CONFIG_ENV_SIZE 0x4200
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000203#define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100204#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
205 "root=/dev/mtdblock0 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200206 "mtdparts=atmel_nand:-(root) " \
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100207 "rw rootfstype=jffs2"
208
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200210
211/* bootstrap + u-boot + env + linux in nandflash */
Xu, Hongf7aea462011-07-31 22:49:00 +0000212#define CONFIG_ENV_IS_IN_NAND
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200213#define CONFIG_ENV_OFFSET 0x60000
214#define CONFIG_ENV_OFFSET_REDUND 0x80000
215#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200216#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
217#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
218 "root=/dev/mtdblock5 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200219 "mtdparts=atmel_nand:128k(bootstrap)ro," \
Stelian Popd99a8ff2008-05-08 20:52:22 +0200220 "256k(uboot)ro,128k(env1)ro," \
221 "128k(env2)ro,2M(linux),-(root) " \
222 "rw rootfstype=jffs2"
223
224#endif
225
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_SYS_PROMPT "U-Boot> "
227#define CONFIG_SYS_CBSIZE 256
228#define CONFIG_SYS_MAXARGS 16
229#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Xu, Hongf7aea462011-07-31 22:49:00 +0000230#define CONFIG_SYS_LONGHELP
231#define CONFIG_CMDLINE_EDITING
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000232#define CONFIG_AUTO_COMPLETE
Stelian Popd99a8ff2008-05-08 20:52:22 +0200233
Stelian Popd99a8ff2008-05-08 20:52:22 +0200234/*
235 * Size of malloc() pool
236 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Stelian Popd99a8ff2008-05-08 20:52:22 +0200238
Stelian Popd99a8ff2008-05-08 20:52:22 +0200239#endif