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wdenkdb2f721f2003-03-06 00:58:30 +00001/*
2 * (C) Copyright 2003
3 * EMK Elektronik GmbH <www.emk-elektronik.de>
4 * Reinhard Meyer <r.meyer@emk-elektronik.de>
5 *
6 * Board specific routines for the TOP860
7 *
8 * - initialisation
9 * - interface to VPD data (mac address, clock speeds)
10 * - memory controller
11 * - serial io initialisation
12 * - ethernet io initialisation
13 *
14 * -----------------------------------------------------------------
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <commproc.h>
36#include <mpc8xx.h>
37
38/*****************************************************************************
39 * UPM table for 60ns EDO RAM at 25 MHz bus/external clock
40 *****************************************************************************/
41static const uint edo_60ns_25MHz_tbl[] = {
42
43/* single read (offset 0x00 in upm ram) */
44 0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00,
45 0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05,
46/* burst read (offset 0x08 in upm ram) */
47 0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40,
48 0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48,
49 0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05,
50 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
51/* single write (offset 0x18 in upm ram) */
52 0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07,
53 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
54/* burst write (offset 0x20 in upm ram) */
55 0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c,
56 0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c,
57 0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05,
58 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
59/* refresh (offset 0x30 in upm ram) */
60 0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04,
61 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
62 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05,
63/* exception (offset 0x3C in upm ram) */
64 0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05,
65};
66
67/*****************************************************************************
68 * Print Board Identity
69 *****************************************************************************/
70int checkboard (void)
71{
72 puts ("Board:"CONFIG_IDENT_STRING"\n");
73 return (0);
74}
75
76/*****************************************************************************
77 * Initialize DRAM controller
78 *****************************************************************************/
79long int initdram (int board_type)
80{
81 volatile immap_t *immap = (immap_t *) CFG_IMMR;
82 volatile memctl8xx_t *memctl = &immap->im_memctl;
83
84 /*
85 * Only initialize memory controller when running from FLASH.
86 * When running from RAM, don't touch it.
87 */
88 if ((ulong) initdram & 0xff000000)
89 {
90 volatile uint *addr1, *addr2;
91 uint i, j;
92
93 upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl,
94 sizeof (edo_60ns_25MHz_tbl) / sizeof (uint));
95 memctl->memc_mptpr = 0x0200;
96 memctl->memc_mamr = 0x0ca20330;
97 memctl->memc_or2 = -CFG_DRAM_MAX | OR_CSNT_SAM;
98 memctl->memc_br2 = CFG_DRAM_BASE | BR_MS_UPMA | BR_V;
99 /*
100 * Do 8 read accesses to DRAM
101 */
102 addr1 = (volatile uint*) 0;
103 addr2 = (volatile uint*) 0x00400000;
104 for (i=0, j=0; i<8; i++)
105 j = addr1[0];
106
107 /*
108 * Now check whether we got 4MB or 16MB populated
109 */
110 addr1[0] = 0x12345678;
111 addr1[1] = 0x9abcdef0;
112 addr2[0] = 0xfeedc0de;
113 addr2[1] = 0x47110815;
114 if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815)
115 {
116 /* only 4MB populated */
117 memctl->memc_or2 = -(CFG_DRAM_MAX/4) | OR_CSNT_SAM;
118 }
119 }
120
121 return -(memctl->memc_or2 & 0xffff0000);
122}
123
124/*****************************************************************************
125 * otherinits after RAM is there and we are relocated to RAM
126 * note: though this is an int function, nobody cares for the result!
127 *****************************************************************************/
128int misc_init_r (void)
129{
130 /* read 'factory' part of EEPROM */
131 uchar buf[81];
132 uchar *p;
133 uint length;
134 uint addr;
135 uint len;
136
137 /* get length first */
138 addr = CFG_FACT_OFFSET;
139 if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2))
140 {
141bailout:
142 printf ("cannot read factory configuration\n");
143 printf ("be sure to set ethaddr yourself!\n");
144 return 0;
145 }
146 length = buf[0] + (buf[1]<<8);
147 addr += 2;
148
149 /* sanity check */
150 if (length < 20 || length > CFG_FACT_SIZE-2)
151 goto bailout;
152
153 /* read lines */
154 while (length > 0)
155 {
156 /* read one line */
157 len = length > 80 ? 80 : length;
158 if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len))
159 goto bailout;
160 /* mark end of buffer */
161 buf[len] = 0;
162 /* search end of line */
163 for (p=buf; *p && *p != 0x0a; p++) ;
164 if (!*p)
165 goto bailout;
166 *p++ = 0;
167 /* advance to next line start */
168 length -= p-buf;
169 addr += p-buf;
170 /*printf ("%s\n", buf);*/
171 /* search for our specific entry */
172 if (!strncmp ((char *)buf, "[RLA/lan/Ethernet] ", 19))
173 {
174 setenv ("ethaddr", buf+19);
175 }
176 else if (!strncmp ((char *)buf, "[BOARD/SERIAL] ", 15))
177 {
178 setenv ("serial#", buf+15);
179 }
180 else if (!strncmp ((char *)buf, "[BOARD/TYPE] ", 13))
181 {
182 setenv ("board_id", buf+13);
183 }
184 }
185 return (0);
186}
187