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Graeme Russd47ab0e2011-12-23 16:51:29 +11001/*
2 * (C) Copyright 2011
3 * Graeme Russ, <graeme.russ@gmail.com>
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Graeme Russd47ab0e2011-12-23 16:51:29 +11006 */
7#include <common.h>
Simon Glassf697d522013-02-28 19:26:15 +00008#include <fdtdec.h>
Gabe Black83133152012-11-03 11:41:23 +00009#include <spi.h>
Simon Glassdb55bd72015-01-01 16:18:11 -070010#include <asm/mtrr.h>
Simon Glass86cfb6b2013-03-05 14:39:54 +000011#include <asm/sections.h>
Graeme Russd47ab0e2011-12-23 16:51:29 +110012
13DECLARE_GLOBAL_DATA_PTR;
14
Simon Glass5e989472013-02-28 19:26:10 +000015/* Get the top of usable RAM */
16__weak ulong board_get_usable_ram_top(ulong total_size)
Graeme Russa1d57b72011-12-23 21:14:22 +110017{
Simon Glass5e989472013-02-28 19:26:10 +000018 return gd->ram_size;
19}
20
21int calculate_relocation_address(void)
22{
23 const ulong uboot_size = (uintptr_t)&__bss_end -
24 (uintptr_t)&__text_start;
25 ulong total_size;
Graeme Russa1d57b72011-12-23 21:14:22 +110026 ulong dest_addr;
Simon Glassf697d522013-02-28 19:26:15 +000027 ulong fdt_size = 0;
Graeme Russa1d57b72011-12-23 21:14:22 +110028
Simon Glassf697d522013-02-28 19:26:15 +000029#if defined(CONFIG_OF_SEPARATE) && defined(CONFIG_OF_CONTROL)
30 if (gd->fdt_blob)
31 fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
32#endif
Simon Glass5e989472013-02-28 19:26:10 +000033 total_size = ALIGN(uboot_size, 1 << 12) + CONFIG_SYS_MALLOC_LEN +
Simon Glassf697d522013-02-28 19:26:15 +000034 CONFIG_SYS_STACK_SIZE + fdt_size;
Simon Glass5e989472013-02-28 19:26:10 +000035
Simon Glassf697d522013-02-28 19:26:15 +000036 dest_addr = board_get_usable_ram_top(total_size);
Graeme Russa1d57b72011-12-23 21:14:22 +110037 /*
38 * NOTE: All destination address are rounded down to 16-byte
39 * boundary to satisfy various worst-case alignment
40 * requirements
41 */
Simon Glassf697d522013-02-28 19:26:15 +000042 dest_addr &= ~15;
Graeme Russa1d57b72011-12-23 21:14:22 +110043
Simon Glassf697d522013-02-28 19:26:15 +000044#if defined(CONFIG_OF_SEPARATE) && defined(CONFIG_OF_CONTROL)
45 /*
46 * If the device tree is sitting immediate above our image then we
47 * must relocate it. If it is embedded in the data section, then it
48 * will be relocated with other data.
49 */
50 if (gd->fdt_blob) {
51 dest_addr -= fdt_size;
Simon Glass1938f4a2013-03-11 06:49:53 +000052 gd->new_fdt = (void *)dest_addr;
Simon Glassf697d522013-02-28 19:26:15 +000053 dest_addr &= ~15;
54 }
55#endif
Simon Glass5e989472013-02-28 19:26:10 +000056 /* U-Boot is below the FDT */
57 dest_addr -= uboot_size;
58 dest_addr &= ~((1 << 12) - 1);
Graeme Russa1d57b72011-12-23 21:14:22 +110059 gd->relocaddr = dest_addr;
Simon Glass5e989472013-02-28 19:26:10 +000060 gd->reloc_off = dest_addr - (uintptr_t)&__text_start;
Graeme Russa1d57b72011-12-23 21:14:22 +110061
Gabe Black32f98732012-11-03 11:41:24 +000062 /* Stack is at the bottom, so it can grow down */
63 gd->start_addr_sp = dest_addr - CONFIG_SYS_MALLOC_LEN;
64
Graeme Russa1d57b72011-12-23 21:14:22 +110065 return 0;
66}
67
Graeme Russa1d57b72011-12-23 21:14:22 +110068int init_cache_f_r(void)
69{
Simon Glassdb55bd72015-01-01 16:18:11 -070070#if defined(CONFIG_X86_RESET_VECTOR) & !defined(CONFIG_HAVE_FSP)
71 int ret;
72
73 ret = mtrr_commit(false);
74 if (ret)
75 return ret;
76#endif
Graeme Russa1d57b72011-12-23 21:14:22 +110077 /* Initialise the CPU cache(s) */
78 return init_cache();
79}
80
Graeme Russd47ab0e2011-12-23 16:51:29 +110081bd_t bd_data;
82
83int init_bd_struct_r(void)
84{
85 gd->bd = &bd_data;
86 memset(gd->bd, 0, sizeof(bd_t));
87
88 return 0;
89}
90
Gabe Black83133152012-11-03 11:41:23 +000091int init_func_spi(void)
92{
93 puts("SPI: ");
94 spi_init();
95 puts("ready\n");
96 return 0;
97}