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Sergei Poselenov9531a232010-09-09 23:03:31 +02001/*
2 * (C) Copyright 2003-2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2010
6 * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
30/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
35#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */
37#define CONFIG_A4M072 1 /* ... on A4M072 board */
38#define CONFIG_MPC5200_DDR 1 /* ... use DDR RAM */
39
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +020040#define CONFIG_SYS_TEXT_BASE 0xFE000000
41
Sergei Poselenov9531a232010-09-09 23:03:31 +020042#define CONFIG_MISC_INIT_R
43
44#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
45
Sergei Poselenov9531a232010-09-09 23:03:31 +020046#define CONFIG_HIGH_BATS 1 /* High BATs supported */
47
48/*
49 * Serial console configuration
50 */
51#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
52#define CONFIG_BAUDRATE 9600 /* ... at 9600 bps */
53#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
54/* define to enable silent console */
55#define CONFIG_SILENT_CONSOLE
56#define CONFIG_SYS_DEVICE_NULLDEV 1 /* include nulldev device */
57
58/*
59 * PCI Mapping:
60 * 0x40000000 - 0x4fffffff - PCI Memory
61 * 0x50000000 - 0x50ffffff - PCI IO Space
62 */
63#define CONFIG_PCI
64
65#if defined(CONFIG_PCI)
66#define CONFIG_PCI_PNP 1
67#define CONFIG_PCI_SCAN_SHOW 1
68#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
69
70#define CONFIG_PCI_MEM_BUS 0x40000000
71#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
72#define CONFIG_PCI_MEM_SIZE 0x10000000
73
74#define CONFIG_PCI_IO_BUS 0x50000000
75#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
76#define CONFIG_PCI_IO_SIZE 0x01000000
77#endif
78
79#define CONFIG_SYS_XLB_PIPELINING 1
80
Wolfgang Denk071bc922010-10-27 22:48:30 +020081#undef CONFIG_EEPRO100
Sergei Poselenov9531a232010-09-09 23:03:31 +020082
83/* Partitions */
84#define CONFIG_MAC_PARTITION
85#define CONFIG_DOS_PARTITION
86
87/* USB */
88#define CONFIG_USB_OHCI_NEW
89#define CONFIG_USB_STORAGE
90#define CONFIG_SYS_OHCI_BE_CONTROLLER
91#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
92#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
93#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
94#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
95#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
96
97#define CONFIG_TIMESTAMP /* Print image info with timestamp */
98
99/*
100 * BOOTP options
101 */
102#define CONFIG_BOOTP_BOOTFILESIZE
103#define CONFIG_BOOTP_BOOTPATH
104#define CONFIG_BOOTP_GATEWAY
105#define CONFIG_BOOTP_HOSTNAME
106
107
108/*
109 * Command line configuration.
110 */
111#include <config_cmd_default.h>
112
113#define CONFIG_CMD_EEPROM
114#define CONFIG_CMD_FAT
115#define CONFIG_CMD_I2C
116#define CONFIG_CMD_IDE
117#define CONFIG_CMD_NFS
118#define CONFIG_CMD_SNTP
119#define CONFIG_CMD_USB
120#define CONFIG_CMD_MII
121#define CONFIG_CMD_DHCP
122#define CONFIG_CMD_PING
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200123#define CONFIG_CMD_DISPLAY
Sergei Poselenov9531a232010-09-09 23:03:31 +0200124
125#if defined(CONFIG_PCI)
126#define CONFIG_CMD_PCI
127#endif
128
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200129#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200130#define CONFIG_SYS_LOWBOOT 1
131#define CONFIG_SYS_LOWBOOT32 1
132#endif
133
134/*
135 * Autobooting
136 */
137#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
138
139#define CONFIG_SYS_AUTOLOAD "n"
140
141#define CONFIG_AUTOBOOT_KEYED
142#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay
143#define CONFIG_AUTOBOOT_DELAY_STR "asdfg"
144
145#undef CONFIG_BOOTARGS
146#define CONFIG_PREBOOT "run try_update"
147
148#define CONFIG_EXTRA_ENV_SETTINGS \
Ilya Yanok7ae54992010-10-21 17:20:09 +0200149 "bk=run add_mtd ; run add_consolespec ; bootm 200000\0" \
150 "cf1=diskboot 200000 0:1\0" \
151 "bootcmd_cf1=run bcf1\0" \
152 "bcf=setenv bootargs root=/dev/hda3\0" \
153 "bootcmd_nfs=run bnfs\0" \
154 "norargs=setenv bootargs root=/dev/mtdblock3 rootfstype=cramfs "\
155 "panic=1\0" \
156 "bootcmd_nor=cp.b ${kernel_addr} 200000 100000;" \
157 "run norargs addip; run bk\0" \
158 "bnfs=nfs 200000 ${rootpath}/boot/uImage;" \
159 "run nfsargs addip ; run bk\0" \
160 "nfsargs=setenv bootargs root=/dev/nfs rw " \
161 "nfsroot=${serverip}:${rootpath}\0" \
162 "try_update=usb start;sleep 2;usb start;sleep 1;" \
163 "fatload usb 0 2F0000 PCPUUPDT 2FF;usb stop;" \
164 "source 2F0000\0" \
165 "env_addr=FE060000\0" \
166 "kernel_addr=FE100000\0" \
167 "rootfs_addr=FE200000\0" \
168 "add_mtd=setenv bootargs ${bootargs} mtdparts=" \
169 "phys_mapped_flash:384k(u),640k(e),1m(k),30m(r)\0" \
170 "bcf1=run cf1; run bcf; run addip; run bk\0" \
171 "add_consolespec=setenv bootargs ${bootargs} " \
172 "console=/dev/null quiet\0" \
173 "addip=if test -n ${ethaddr};" \
174 "then if test -n ${ipaddr};" \
175 "then setenv bootargs ${bootargs} " \
176 "ip=${ipaddr}:${serverip}:${gatewayip}:"\
177 "${netmask}:${hostname}:${netdev}:off;" \
178 "fi;" \
179 "else;" \
180 "setenv bootargs ${bootargs} no_ethaddr;" \
181 "fi\0" \
182 "hostname=CPUP0\0" \
183 "ethaddr=00:00:00:00:00:00\0" \
184 "netdev=eth0\0" \
185 "bootcmd=run bootcmd_nor\0" \
Sergei Poselenov9531a232010-09-09 23:03:31 +0200186 ""
187/*
188 * IPB Bus clocking configuration.
189 */
190#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
191
192/*
193 * I2C configuration
194 */
195#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
196#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
197
198#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
199#define CONFIG_SYS_I2C_SLAVE 0x7F
200
201/*
202 * EEPROM configuration
203 */
204#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
205#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
206#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
207#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
208#define CONFIG_SYS_EEPROM_WREN 1
209#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
210
211/*
212 * Flash configuration
213 */
214#define CONFIG_SYS_FLASH_BASE 0xFE000000
215#define CONFIG_SYS_FLASH_SIZE 0x02000000
216#if !defined(CONFIG_SYS_LOWBOOT)
217#error "CONFIG_SYS_LOWBOOT not defined?"
218#else /* CONFIG_SYS_LOWBOOT */
219#if defined(CONFIG_SYS_LOWBOOT32)
220#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
221#endif
222#endif /* CONFIG_SYS_LOWBOOT */
223
224#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
225#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
226#define CONFIG_FLASH_CFI_DRIVER
227#define CONFIG_SYS_FLASH_CFI
228#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
229#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS0_START}
Ilya Yanoke36aff62010-10-21 17:20:13 +0200230#define CONFIG_SYS_FLASH_BANKS_SIZES {CONFIG_SYS_CS0_SIZE}
Sergei Poselenov9531a232010-09-09 23:03:31 +0200231
232/*
233 * Environment settings
234 */
235#define CONFIG_ENV_IS_IN_FLASH 1
236#define CONFIG_ENV_SIZE 0x10000
237#define CONFIG_ENV_SECT_SIZE 0x20000
238#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
239#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
240
241#define CONFIG_ENV_OVERWRITE 1
242
243/*
244 * Memory map
245 */
246#define CONFIG_SYS_MBAR 0xF0000000
247#define CONFIG_SYS_SDRAM_BASE 0x00000000
248#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
249
250/* Use SRAM until RAM will be available */
251#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200252#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Sergei Poselenov9531a232010-09-09 23:03:31 +0200253
254
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200255#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Sergei Poselenov9531a232010-09-09 23:03:31 +0200256#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
257
Wolfgang Denkc8d76ea2010-10-18 23:43:37 +0200258#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Sergei Poselenov9531a232010-09-09 23:03:31 +0200259#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
260# define CONFIG_SYS_RAMBOOT 1
261#endif
262
263#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
264#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
265#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
266
267/*
268 * Ethernet configuration
269 */
270#define CONFIG_MPC5xxx_FEC 1
271#define CONFIG_MPC5xxx_FEC_MII100
272/*
273 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
274 */
275/* #define CONFIG_MPC5xxx_FEC_MII10 */
276#define CONFIG_PHY_ADDR 0x1f
277#define CONFIG_PHY_TYPE 0x79c874 /* AMD Phy Controller */
278
279/*
280 * GPIO configuration
281 */
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200282#define CONFIG_SYS_GPS_PORT_CONFIG 0x18000004
Sergei Poselenov9531a232010-09-09 23:03:31 +0200283
284/*
285 * Miscellaneous configurable options
286 */
287#define CONFIG_SYS_HUSH_PARSER
288#define CONFIG_CMDLINE_EDITING 1
Sergei Poselenov9531a232010-09-09 23:03:31 +0200289#define CONFIG_SYS_LONGHELP /* undef to save memory */
290#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
291#if defined(CONFIG_CMD_KGDB)
292#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
293#else
294#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
295#endif
296#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
297#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
298#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
299
300#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
301#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
302
303#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
304
305#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
306
307#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
308#if defined(CONFIG_CMD_KGDB)
309# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
310#endif
311
312
313/*
314 * Various low-level settings
315 */
316#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
317#define CONFIG_SYS_HID0_FINAL HID0_ICE
318/* Flash at CSBoot, CS0 */
319#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
320#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
321#define CONFIG_SYS_BOOTCS_CFG 0x0002DD00
322#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
323#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
324/* External SRAM at CS1 */
325#define CONFIG_SYS_CS1_START 0x62000000
326#define CONFIG_SYS_CS1_SIZE 0x00400000
327#define CONFIG_SYS_CS1_CFG 0x00009930
328#define CONFIG_SYS_SRAM_BASE CONFIG_SYS_CS1_START
329#define CONFIG_SYS_SRAM_SIZE CONFIG_SYS_CS1_SIZE
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200330/* LED display at CS7 */
331#define CONFIG_SYS_CS7_START 0x6a000000
332#define CONFIG_SYS_CS7_SIZE (64*1024)
333#define CONFIG_SYS_CS7_CFG 0x0000bf30
Sergei Poselenov9531a232010-09-09 23:03:31 +0200334
335#define CONFIG_SYS_CS_BURST 0x00000000
336#define CONFIG_SYS_CS_DEADCYCLE 0x33333003
337
338#define CONFIG_SYS_RESET_ADDRESS 0xff000000
339
340/*-----------------------------------------------------------------------
341 * USB stuff
342 *-----------------------------------------------------------------------
343 */
344#define CONFIG_USB_CLOCK 0x0001BBBB
345#define CONFIG_USB_CONFIG 0x00001000 /* 0x4000 for SE mode */
346
347/*-----------------------------------------------------------------------
348 * IDE/ATA stuff Supports IDE harddisk
349 *-----------------------------------------------------------------------
350 */
351
352#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
353
354#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
355#undef CONFIG_IDE_LED /* LED for ide not supported */
356
357#define CONFIG_IDE_PREINIT
358
359#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
360#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
361
362#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
363
364#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
365
366/* Offset for data I/O */
367#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
368
369/* Offset for normal register accesses */
370#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
371
372/* Offset for alternate registers */
373#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
374
375/* Interval between registers */
376#define CONFIG_SYS_ATA_STRIDE 4
377
378#define CONFIG_ATAPI 1
379
380/*-----------------------------------------------------------------------
381 * Open firmware flat tree support
382 *-----------------------------------------------------------------------
383 */
384#define CONFIG_OF_LIBFDT 1
385#define CONFIG_OF_BOARD_SETUP 1
386
387#define OF_CPU "PowerPC,5200@0"
388#define OF_SOC "soc5200@f0000000"
389#define OF_TBCLK (bd->bi_busfreq / 4)
390#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
391
Ilya Yanokcb5639c2010-09-09 23:03:33 +0200392/* Support for the 7-segment display */
393#define CONFIG_SYS_DISP_CHR_RAM CONFIG_SYS_CS7_START
394#define CONFIG_SHOW_ACTIVITY /* used for display realization */
395
Ilya Yanok92d1a402010-09-09 23:03:34 +0200396#define CONFIG_SHOW_BOOT_PROGRESS
397
Sergei Poselenov9531a232010-09-09 23:03:31 +0200398#endif /* __CONFIG_H */