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Stefano Babicf8f8acd2010-07-06 19:32:09 +02001/*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51-3Stack Freescale board.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
Stefano Babicf8f8acd2010-07-06 19:32:09 +020027
28#define CONFIG_MX51 /* in a mx51 */
Fabio Estevamc02d8282011-05-10 08:13:56 +000029#define CONFIG_SYS_TEXT_BASE 0x97800000
Stefano Babicf8f8acd2010-07-06 19:32:09 +020030
Liu Hui-R64343595f3e52011-01-03 22:27:35 +000031#include <asm/arch/imx-regs.h>
32
Stefano Babicf8f8acd2010-07-06 19:32:09 +020033#define CONFIG_DISPLAY_CPUINFO
34#define CONFIG_DISPLAY_BOARDINFO
35
36#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Stefano Babicf8f8acd2010-07-06 19:32:09 +020037#define CONFIG_SETUP_MEMORY_TAGS
38#define CONFIG_INITRD_TAG
Helmut Raiger9660e442011-10-20 04:19:47 +000039#define CONFIG_BOARD_LATE_INIT
Stefano Babicf8f8acd2010-07-06 19:32:09 +020040
Stefano Babic1cf820f2011-10-27 14:30:27 +020041#ifndef MACH_TYPE_TTC_VISION2
42#define MACH_TYPE_TTC_VISION2 2775
43#endif
Fabio Estevamdb545e42011-09-23 02:50:51 +000044#define CONFIG_MACH_TYPE MACH_TYPE_TTC_VISION2
45
Stefano Babicf8f8acd2010-07-06 19:32:09 +020046/*
47 * Size of malloc() pool
48 */
Stefano Babice9934f02011-09-28 11:21:15 +020049#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
Stefano Babicf8f8acd2010-07-06 19:32:09 +020050
Stefano Babicf8f8acd2010-07-06 19:32:09 +020051/*
52 * Hardware drivers
53 */
54#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010055#define CONFIG_MXC_UART_BASE UART3_BASE
Stefano Babicf8f8acd2010-07-06 19:32:09 +020056#define CONFIG_MXC_GPIO
57#define CONFIG_MXC_SPI
58#define CONFIG_HW_WATCHDOG
59
60 /*
61 * SPI Configs
62 * */
63#define CONFIG_FSL_SF
64#define CONFIG_CMD_SF
65
66#define CONFIG_SPI_FLASH
67#define CONFIG_SPI_FLASH_STMICRO
68
69/*
70 * Use gpio 4 pin 25 as chip select for SPI flash
71 * This corresponds to gpio 121
72 */
Fabio Estevam94f00032012-03-22 14:29:04 +000073#define CONFIG_SF_DEFAULT_CS (1 | (121 << 8))
Stefano Babicf8f8acd2010-07-06 19:32:09 +020074#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
75#define CONFIG_SF_DEFAULT_SPEED 25000000
76
77#define CONFIG_ENV_SPI_CS (1 | (121 << 8))
78#define CONFIG_ENV_SPI_BUS 0
79#define CONFIG_ENV_SPI_MAX_HZ 25000000
80#define CONFIG_ENV_SPI_MODE SPI_MODE_0
81
82#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
83#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
84#define CONFIG_ENV_SIZE (4 * 1024)
85
86#define CONFIG_FSL_ENV_IN_SF
87#define CONFIG_ENV_IS_IN_SPI_FLASH
88
89/* PMIC Controller */
Stefano Babicbac395e2011-10-02 12:58:03 +020090#define CONFIG_PMIC
91#define CONFIG_PMIC_SPI
92#define CONFIG_PMIC_FSL
Stefano Babicf8f8acd2010-07-06 19:32:09 +020093#define CONFIG_FSL_PMIC_BUS 0
94#define CONFIG_FSL_PMIC_CS 0
95#define CONFIG_FSL_PMIC_CLK 2500000
96#define CONFIG_FSL_PMIC_MODE SPI_MODE_0
Stefano Babicbac395e2011-10-02 12:58:03 +020097#define CONFIG_FSL_PMIC_BITLEN 32
Fabio Estevam4e8b7542011-10-24 06:44:15 +000098#define CONFIG_RTC_MC13XXX
Stefano Babicf8f8acd2010-07-06 19:32:09 +020099
100/*
101 * MMC Configs
102 */
103#define CONFIG_FSL_ESDHC
104#ifdef CONFIG_FSL_ESDHC
105#define CONFIG_SYS_FSL_ESDHC_ADDR (0x70004000)
106#define CONFIG_SYS_FSL_ESDHC_NUM 1
107
108#define CONFIG_MMC
109
110#define CONFIG_CMD_MMC
111#define CONFIG_GENERIC_MMC
112#define CONFIG_CMD_FAT
113#define CONFIG_DOS_PARTITION
114#endif
115
116#define CONFIG_CMD_DATE
117
118/*
119 * Eth Configs
120 */
121#define CONFIG_HAS_ETH1
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200122#define CONFIG_MII
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200123
124#define CONFIG_FEC_MXC
125#define IMX_FEC_BASE FEC_BASE_ADDR
126#define CONFIG_FEC_MXC_PHYADDR 0x1F
127
128#define CONFIG_CMD_PING
129#define CONFIG_CMD_MII
130#define CONFIG_CMD_NET
131
132/* allow to overwrite serial and ethaddr */
133#define CONFIG_ENV_OVERWRITE
134#define CONFIG_CONS_INDEX 3
135#define CONFIG_BAUDRATE 115200
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200136
137/***********************************************************
138 * Command definition
139 ***********************************************************/
140
141#include <config_cmd_default.h>
142
143#define CONFIG_CMD_SPI
144#undef CONFIG_CMD_IMLS
145
146#define CONFIG_BOOTDELAY 3
147
148#define CONFIG_LOADADDR 0x90800000 /* loadaddr env var */
149
150#define CONFIG_EXTRA_ENV_SETTINGS \
151 "netdev=eth0\0" \
152 "loadaddr=0x90800000\0"
153
154/*
155 * Miscellaneous configurable options
156 */
157#define CONFIG_SYS_LONGHELP
158#define CONFIG_SYS_PROMPT "Vision II U-boot > "
159#define CONFIG_AUTO_COMPLETE
160#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
161
162/* Print Buffer Size */
163#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
164 sizeof(CONFIG_SYS_PROMPT) + 16)
165#define CONFIG_SYS_MAXARGS 64 /* max number of command args */
166#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
167
168#define CONFIG_SYS_MEMTEST_START 0x90000000
169#define CONFIG_SYS_MEMTEST_END 0x10000
170
171#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
172
173#define CONFIG_SYS_HZ 1000
174#define CONFIG_CMDLINE_EDITING
175#define CONFIG_SYS_HUSH_PARSER
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200176
177/*
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200178 * Physical Memory Map
179 */
180#define CONFIG_NR_DRAM_BANKS 2
181#define PHYS_SDRAM_1 CSD0_BASE_ADDR
182#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
183#define PHYS_SDRAM_2 CSD1_BASE_ADDR
184#define PHYS_SDRAM_2_SIZE (256 * 1024 * 1024)
Stefano Babic43883dc2011-01-21 17:39:03 +0100185#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
186#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
187#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200188
Stefano Babic43883dc2011-01-21 17:39:03 +0100189#define CONFIG_SYS_INIT_SP_OFFSET \
190 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
191#define CONFIG_SYS_INIT_SP_ADDR \
192 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
193
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200194#define CONFIG_BOARD_EARLY_INIT_F
195
196/* 166 MHz DDR RAM */
197#define CONFIG_SYS_DDR_CLKSEL 0
198#define CONFIG_SYS_CLKTL_CBCDR 0x19239100
199
200#define CONFIG_SYS_NO_FLASH
201
Stefano Babica0152c42010-10-21 10:34:39 +0200202/*
203 * Framebuffer and LCD
204 */
205#define CONFIG_PREBOOT
Stefano Babice9934f02011-09-28 11:21:15 +0200206#define CONFIG_VIDEO
Fabio Estevam695af9a2012-05-31 07:23:56 +0000207#define CONFIG_VIDEO_IPUV3
Stefano Babice9934f02011-09-28 11:21:15 +0200208#define CONFIG_CFB_CONSOLE
209#define CONFIG_VGA_AS_SINGLE_DEVICE
Fabio Estevamfca37fc2012-08-05 07:31:34 +0000210#define CONFIG_SYS_CONSOLE_IS_IN_ENV
211#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
Stefano Babice9934f02011-09-28 11:21:15 +0200212#define CONFIG_VIDEO_BMP_RLE8
Stefano Babica0152c42010-10-21 10:34:39 +0200213#define CONFIG_SPLASH_SCREEN
214#define CONFIG_CMD_BMP
215#define CONFIG_BMP_16BPP
Fabio Estevam9fbdb1a2012-05-31 07:24:00 +0000216#define CONFIG_IPUV3_CLK 133000000
Stefano Babica0152c42010-10-21 10:34:39 +0200217
Stefano Babicf8f8acd2010-07-06 19:32:09 +0200218#endif /* __CONFIG_H */