blob: ab74d5b26b6fd3a3ad40903fc856705fb489031b [file] [log] [blame]
Ilko Iliev7666ccc2021-04-23 09:45:52 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __IMX8M_CM_H
7#define __IMX8M_CM_H
8
9#include <linux/sizes.h>
10#include <linux/stringify.h>
11#include <asm/arch/imx-regs.h>
12
Ilko Iliev7666ccc2021-04-23 09:45:52 +020013#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Ilko Iliev7666ccc2021-04-23 09:45:52 +020014
15#ifdef CONFIG_SPL_BUILD
Ilko Iliev7666ccc2021-04-23 09:45:52 +020016#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
17
18/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
19#define CONFIG_MALLOC_F_ADDR 0x182000
20/* For RAW image gives a error info not panic */
Ilko Iliev7666ccc2021-04-23 09:45:52 +020021
22#endif
23
Ilko Iliev7666ccc2021-04-23 09:45:52 +020024/* ENET Config */
25/* ENET1 */
Ilko Iliev7666ccc2021-04-23 09:45:52 +020026
Ilko Iliev7666ccc2021-04-23 09:45:52 +020027#define BOOT_TARGET_DEVICES(func) \
28 func(MMC, mmc, 0) \
29 func(MMC, mmc, 1) \
30 func(DHCP, dhcp, na)
31
32#include <config_distro_bootcmd.h>
Ilko Iliev7666ccc2021-04-23 09:45:52 +020033
34/* Initial environment variables */
35#define CONFIG_EXTRA_ENV_SETTINGS \
36 BOOTENV \
37 "scriptaddr=0x43500000\0" \
38 "kernel_addr_r=0x40880000\0" \
39 "image=Image\0" \
40 "console=ttymxc0,115200\0" \
41 "fdt_addr=0x43000000\0" \
42 "boot_fdt=try\0" \
43 "fdt_file=imx8mq-cm.dtb\0" \
44 "initrd_addr=0x43800000\0" \
45 "bootm_size=0x10000000\0" \
Tom Rinide35b8f2021-12-11 14:55:52 -050046 "mmcpart=1\0" \
Peng Fanadfaa422022-04-15 12:23:41 +080047 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
Ilko Iliev7666ccc2021-04-23 09:45:52 +020048
49/* Link Definitions */
Ilko Iliev7666ccc2021-04-23 09:45:52 +020050
51#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
52#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
Ilko Iliev7666ccc2021-04-23 09:45:52 +020053
Ilko Iliev7666ccc2021-04-23 09:45:52 +020054
Ilko Iliev7666ccc2021-04-23 09:45:52 +020055#define CONFIG_SYS_SDRAM_BASE 0x40000000
56#define PHYS_SDRAM 0x40000000
57#define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */
58
Marek Vasut52b6b482022-04-24 23:44:03 +020059#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
Ilko Iliev7666ccc2021-04-23 09:45:52 +020060
Ilko Iliev7666ccc2021-04-23 09:45:52 +020061#define CONFIG_SYS_FSL_USDHC_NUM 2
62#define CONFIG_SYS_FSL_ESDHC_ADDR 0
63
Ilko Iliev7666ccc2021-04-23 09:45:52 +020064#endif