| Heiko Schocher | 466f013 | 2011-01-13 08:25:00 +0100 | [diff] [blame] | 1 | The common CFI driver provides this weak default implementation for |
| 2 | flash_cmd_reset(): |
| 3 | |
| Robert P. J. Day | 66723ed | 2016-12-29 05:23:19 -0500 | [diff] [blame] | 4 | static void __flash_cmd_reset(flash_info_t *info) |
| Heiko Schocher | 466f013 | 2011-01-13 08:25:00 +0100 | [diff] [blame] | 5 | { |
| 6 | /* |
| 7 | * We do not yet know what kind of commandset to use, so we issue |
| 8 | * the reset command in both Intel and AMD variants, in the hope |
| 9 | * that AMD flash roms ignore the Intel command. |
| 10 | */ |
| 11 | flash_write_cmd(info, 0, 0, AMD_CMD_RESET); |
| Robert P. J. Day | 66723ed | 2016-12-29 05:23:19 -0500 | [diff] [blame] | 12 | udelay(1); |
| Heiko Schocher | 466f013 | 2011-01-13 08:25:00 +0100 | [diff] [blame] | 13 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
| 14 | } |
| 15 | void flash_cmd_reset(flash_info_t *info) |
| 16 | __attribute__((weak,alias("__flash_cmd_reset"))); |
| 17 | |
| Robert P. J. Day | 66723ed | 2016-12-29 05:23:19 -0500 | [diff] [blame] | 18 | Some flash chips seem to have trouble with this reset sequence. |
| 19 | In this case, board-specific code can override this weak default |
| 20 | version with a board-specific function. |
| Heiko Schocher | 466f013 | 2011-01-13 08:25:00 +0100 | [diff] [blame] | 21 | |
| Robert P. J. Day | 66723ed | 2016-12-29 05:23:19 -0500 | [diff] [blame] | 22 | At the time of writing, there are two boards that define their own |
| 23 | routine for this. |
| 24 | |
| 25 | First, the digsy_mtc board equipped with the M29W128GH from Numonyx |
| 26 | needs this version to function properly: |
| Heiko Schocher | 466f013 | 2011-01-13 08:25:00 +0100 | [diff] [blame] | 27 | |
| 28 | void flash_cmd_reset(flash_info_t *info) |
| 29 | { |
| 30 | flash_write_cmd(info, 0, 0, AMD_CMD_RESET); |
| 31 | } |
| 32 | |
| Robert P. J. Day | 66723ed | 2016-12-29 05:23:19 -0500 | [diff] [blame] | 33 | In addition, the t3corp board defines the routine thusly: |
| 34 | |
| 35 | void flash_cmd_reset(flash_info_t *info) |
| 36 | { |
| 37 | /* |
| 38 | * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and |
| 39 | * needs the Spansion type reset commands. The other flash chip |
| 40 | * is located behind a FPGA (Xilinx DS617) and needs the Intel type |
| 41 | * reset command. |
| 42 | */ |
| 43 | if (info->start[0] == CONFIG_SYS_FLASH_BASE) |
| 44 | flash_write_cmd(info, 0, 0, AMD_CMD_RESET); |
| 45 | else |
| 46 | flash_write_cmd(info, 0, 0, FLASH_CMD_RESET); |
| 47 | } |
| 48 | |
| Heiko Schocher | 466f013 | 2011-01-13 08:25:00 +0100 | [diff] [blame] | 49 | see also: |
| 50 | http://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html |
| pekon gupta | 3df3bc1 | 2014-07-22 16:03:21 +0530 | [diff] [blame] | 51 | |
| 52 | |
| 53 | Config Option |
| 54 | |
| 55 | CONFIG_SYS_MAX_FLASH_SECT: Number of sectors available on Flash device |
| 56 | |
| 57 | CONFIG_SYS_FLASH_CFI_WIDTH: Data-width of the flash device |
| 58 | |
| 59 | CONFIG_CMD_FLASH: Enables Flash command library |
| 60 | |
| 61 | CONFIG_FLASH_CFI_DRIVER: Enables CFI Flash driver |
| 62 | |
| 63 | CONFIG_FLASH_CFI_MTD: Enables MTD frame work for NOR Flash devices |