Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2015 |
| 3 | * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de |
| 4 | * |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
| 12 | /* |
| 13 | * DDR Setup |
| 14 | */ |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 15 | #define CFG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory */ |
| 16 | /* TODO: Check: Can this be unified with CFG_SYS_SDRAM_BASE? */ |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 17 | #define CFG_SYS_DDR_SDRAM_BASE CFG_SYS_SDRAM_BASE |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 18 | |
| 19 | /* |
| 20 | * Memory test |
| 21 | * TODO: Migrate! |
| 22 | */ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 23 | |
| 24 | /* |
| 25 | * The reserved memory |
| 26 | */ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 27 | |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 28 | /* |
| 29 | * Initial RAM Base Address Setup |
| 30 | */ |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 31 | #define CFG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ |
| 32 | #define CFG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM */ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 33 | |
| 34 | /* |
| 35 | * FLASH on the Local Bus |
| 36 | */ |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 37 | #define CFG_SYS_FLASH_BASE 0xFE000000 /* FLASH base address */ |
| 38 | #define CFG_SYS_FLASH_SIZE 8 /* FLASH size is up to 8M */ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 39 | |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 40 | #define CFG_SYS_BAUDRATE_TABLE \ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 41 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} |
| 42 | |
| 43 | /* |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 44 | * Miscellaneous configurable options |
| 45 | */ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 46 | |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 47 | /* |
| 48 | * For booting Linux, the board info and command line data |
| 49 | * have to be in the first 256 MB of memory, since this is |
| 50 | * the maximum mapped by the Linux kernel during initialization. |
| 51 | */ |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 52 | #define CFG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux */ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 53 | |
| 54 | /* |
| 55 | * Environment Configuration |
| 56 | */ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 57 | |
Tom Rini | 0613c36 | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 58 | #define CFG_EXTRA_ENV_SETTINGS \ |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 59 | "netdev=eth0\0" \ |
| 60 | "consoledev=ttyS1\0" \ |
| 61 | "u-boot=u-boot.bin\0" \ |
| 62 | "kernel_addr=1000000\0" \ |
| 63 | "fdt_addr=C00000\0" \ |
| 64 | "fdtfile=hrcon.dtb\0" \ |
| 65 | "load=tftp ${loadaddr} ${u-boot}\0" \ |
| 66 | "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE) \ |
| 67 | " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\ |
| 68 | " +${filesize};cp.b ${fileaddr} " \ |
| 69 | __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ |
| 70 | "upd=run load update\0" \ |
| 71 | |
Dirk Eibach | d494cdb | 2019-03-29 10:18:19 +0100 | [diff] [blame] | 72 | #endif /* __CONFIG_H */ |