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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Andy Fleming5f184712011-04-08 02:10:27 -05002/*
3 * Generic PHY Management code
4 *
Andy Fleming5f184712011-04-08 02:10:27 -05005 * Copyright 2011 Freescale Semiconductor, Inc.
6 * author Andy Fleming
7 *
8 * Based loosely off of Linux's PHY Lib
9 */
Andy Fleming5f184712011-04-08 02:10:27 -050010#include <common.h>
11#include <miiphy.h>
12#include <phy.h>
13
14int gen10g_shutdown(struct phy_device *phydev)
15{
16 return 0;
17}
18
19int gen10g_startup(struct phy_device *phydev)
20{
21 int devad, reg;
Andy Flemingee8fa202011-05-18 13:44:19 +000022 u32 mmd_mask = phydev->mmds & MDIO_DEVS_LINK;
Andy Fleming5f184712011-04-08 02:10:27 -050023
24 phydev->link = 1;
25
26 /* For now just lie and say it's 10G all the time */
27 phydev->speed = SPEED_10000;
28 phydev->duplex = DUPLEX_FULL;
29
Andy Flemingee8fa202011-05-18 13:44:19 +000030 /*
31 * Go through all the link-reporting devices, and make sure
32 * they're all up and happy
33 */
Andy Fleming5f184712011-04-08 02:10:27 -050034 for (devad = 0; mmd_mask; devad++, mmd_mask = mmd_mask >> 1) {
Andy Flemingee8fa202011-05-18 13:44:19 +000035 if (!(mmd_mask & 1))
Andy Fleming5f184712011-04-08 02:10:27 -050036 continue;
37
38 /* Read twice because link state is latched and a
39 * read moves the current state into the register */
40 phy_read(phydev, devad, MDIO_STAT1);
41 reg = phy_read(phydev, devad, MDIO_STAT1);
42 if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
43 phydev->link = 0;
44 }
45
46 return 0;
47}
48
49int gen10g_discover_mmds(struct phy_device *phydev)
50{
51 int mmd, stat2, devs1, devs2;
52
53 /* Assume PHY must have at least one of PMA/PMD, WIS, PCS, PHY
54 * XS or DTE XS; give up if none is present. */
55 for (mmd = 1; mmd <= 5; mmd++) {
56 /* Is this MMD present? */
57 stat2 = phy_read(phydev, mmd, MDIO_STAT2);
58 if (stat2 < 0 ||
59 (stat2 & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL)
60 continue;
61
62 /* It should tell us about all the other MMDs */
63 devs1 = phy_read(phydev, mmd, MDIO_DEVS1);
64 devs2 = phy_read(phydev, mmd, MDIO_DEVS2);
65 if (devs1 < 0 || devs2 < 0)
66 continue;
67
68 phydev->mmds = devs1 | (devs2 << 16);
69 return 0;
70 }
71
72 return 0;
73}
74
75int gen10g_config(struct phy_device *phydev)
76{
77 /* For now, assume 10000baseT. Fill in later */
78 phydev->supported = phydev->advertising = SUPPORTED_10000baseT_Full;
79
80 return gen10g_discover_mmds(phydev);
81}
82
Marek Vasut20bd8e42023-03-19 18:03:13 +010083U_BOOT_PHY_DRIVER(gen10g) = {
Andy Fleming5f184712011-04-08 02:10:27 -050084 .uid = 0xffffffff,
85 .mask = 0xffffffff,
86 .name = "Generic 10G PHY",
87 .features = 0,
88 .config = gen10g_config,
89 .startup = gen10g_startup,
90 .shutdown = gen10g_shutdown,
91};