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wdenkd1cbe852003-06-28 17:24:46 +00001/*
wdenkc837dcb2004-01-20 23:12:12 +00002 * (C) Copyright 2000-2004
wdenkd1cbe852003-06-28 17:24:46 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkd1cbe852003-06-28 17:24:46 +00006 */
7
8/*
9 * board/config.h - configuration options, board specific
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15/*
16 * High Level Configuration Options
17 * (easy to change)
18 */
19
Wolfgang Denk53677ef2008-05-20 16:00:29 +020020#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
wdenkd1cbe852003-06-28 17:24:46 +000021#define CONFIG_4xx 1 /* ...member of PPC4xx family */
22#define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */
23
wdenkc837dcb2004-01-20 23:12:12 +000024#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
wdenkd1cbe852003-06-28 17:24:46 +000025
26#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
27
28/* I2C configuration */
29#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020030#define CONFIG_SYS_I2C_SPEED 40000 /* I2C speed */
31#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
wdenkd1cbe852003-06-28 17:24:46 +000032
33/* environment is in EEPROM */
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +020034#define CONFIG_ENV_IS_IN_EEPROM 1
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020035#undef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD9314cee2008-09-10 22:47:59 +020036#undef CONFIG_ENV_IS_IN_NVRAM
wdenkd1cbe852003-06-28 17:24:46 +000037
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +020038#ifdef CONFIG_ENV_IS_IN_EEPROM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56 /* 1010110 */
40#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */
41#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */
42#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */
43#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020044#define CONFIG_ENV_OFFSET 4 /* Offset of Environment Sector */
45#define CONFIG_ENV_SIZE 350 /* that is 350 bytes only! */
wdenkd1cbe852003-06-28 17:24:46 +000046#endif
47
48#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
49/* Explanation:
50 autbooting is altogether disabled and cannot be
51 enabled if CONFIG_BOOTDELAY is negative.
wdenk945af8d2003-07-16 21:53:01 +000052 If you want shorter bootdelay, then
wdenkd1cbe852003-06-28 17:24:46 +000053 - "setenv bootdelay <delay>" to the proper value
54*/
55
56#define CONFIG_BOOTCOMMAND "bootm 20400000 20800000"
57
58#define CONFIG_BOOTARGS "root=/dev/ram " \
59 "ramdisk_size=32768 " \
60 "console=ttyS0,115200 " \
61 "ram=128M debug"
62
63#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenkd1cbe852003-06-28 17:24:46 +000065
66#define CONFIG_MII 1 /* MII PHY management */
67#define CONFIG_PHY_ADDR 0 /* PHY address */
68
wdenkd1cbe852003-06-28 17:24:46 +000069
Jon Loeligerdcaa7152007-07-07 20:56:05 -050070/*
Jon Loeliger11799432007-07-10 09:02:57 -050071 * BOOTP options
72 */
73#define CONFIG_BOOTP_BOOTFILESIZE
74#define CONFIG_BOOTP_BOOTPATH
Ben Warren96e21f82008-10-27 23:50:15 -070075#define CONFIG_PPC4xx_EMAC
Jon Loeliger11799432007-07-10 09:02:57 -050076#define CONFIG_BOOTP_GATEWAY
77#define CONFIG_BOOTP_HOSTNAME
78
79
80/*
Jon Loeligerdcaa7152007-07-07 20:56:05 -050081 * Command line configuration.
82 */
83#include <config_cmd_default.h>
84
wdenkd1cbe852003-06-28 17:24:46 +000085
86#undef CONFIG_WATCHDOG /* watchdog disabled */
87
88/*
89 * Miscellaneous configurable options
90 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jon Loeligerdcaa7152007-07-07 20:56:05 -050092#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020093#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkd1cbe852003-06-28 17:24:46 +000094#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020095#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkd1cbe852003-06-28 17:24:46 +000096#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020097#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
98#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
99#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkd1cbe852003-06-28 17:24:46 +0000100
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200101#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
102#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
wdenkd1cbe852003-06-28 17:24:46 +0000103
104/* UART configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#define CONFIG_SYS_BASE_BAUD 691200
wdenkd1cbe852003-06-28 17:24:46 +0000106
107/* Default baud rate */
108#define CONFIG_BAUDRATE 115200
wdenk945af8d2003-07-16 21:53:01 +0000109
wdenkd1cbe852003-06-28 17:24:46 +0000110/* The following table includes the supported baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_BAUDRATE_TABLE \
wdenk945af8d2003-07-16 21:53:01 +0000112 { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
113 57600, 115200, 230400, 460800, 921600 }
wdenkd1cbe852003-06-28 17:24:46 +0000114
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
116#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
wdenkd1cbe852003-06-28 17:24:46 +0000117
wdenkd1cbe852003-06-28 17:24:46 +0000118/*-----------------------------------------------------------------------
119 * PCI stuff
120 *-----------------------------------------------------------------------
121 */
122#undef CONFIG_PCI /* no pci support */
123
124/*-----------------------------------------------------------------------
125 * External peripheral base address
126 *-----------------------------------------------------------------------
127 */
128#undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */
129#undef CONFIG_IDE_LED /* no led for ide supported */
130#undef CONFIG_IDE_RESET /* no reset for ide supported */
131
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000
133#define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000
134#define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000
wdenkd1cbe852003-06-28 17:24:46 +0000135
136/*-----------------------------------------------------------------------
137 * Start addresses for the final memory configuration
138 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkd1cbe852003-06-28 17:24:46 +0000140 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_SDRAM_BASE 0x00000000
142#define CONFIG_SYS_FLASH0_BASE 0xFFF80000
143#define CONFIG_SYS_FLASH0_SIZE 0x00080000
144#define CONFIG_SYS_FLASH1_BASE 0x20000000
145#define CONFIG_SYS_FLASH1_SIZE 0x02000000
146#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH0_BASE
147#define CONFIG_SYS_FLASH_SIZE CONFIG_SYS_FLASH0_SIZE
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200148#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
150#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
wdenkd1cbe852003-06-28 17:24:46 +0000151
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200152#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH0_BASE
153#define CONFIG_SYS_RAMSTART
wdenkd1cbe852003-06-28 17:24:46 +0000154#endif
155
156/*
157 * For booting Linux, the board info and command line data
158 * have to be in the first 8 MB of memory, since this is
159 * the maximum mapped by the Linux kernel during initialization.
160 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200161#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkd1cbe852003-06-28 17:24:46 +0000162/*-----------------------------------------------------------------------
163 * FLASH organization
164 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_MAX_FLASH_BANKS 5 /* max number of memory banks */
166#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
wdenkd1cbe852003-06-28 17:24:46 +0000167
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
169#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenkd1cbe852003-06-28 17:24:46 +0000170
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200171#ifdef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200172#define CONFIG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */
173#define CONFIG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
174#define CONFIG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */
wdenkd1cbe852003-06-28 17:24:46 +0000175#endif
176
177/* On Chip Memory location/size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_OCM_DATA_ADDR 0xF8000000
179#define CONFIG_SYS_OCM_DATA_SIZE 0x1000
wdenkd1cbe852003-06-28 17:24:46 +0000180
181/* Global info and initial stack */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200182#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of on-chip SRAM */
Wolfgang Denk553f0982010-10-26 13:32:32 +0200183#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE /* Size of used area in RAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200184#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkd1cbe852003-06-28 17:24:46 +0000186
Jon Loeligerdcaa7152007-07-07 20:56:05 -0500187#if defined(CONFIG_CMD_KGDB)
wdenkd1cbe852003-06-28 17:24:46 +0000188#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
wdenkd1cbe852003-06-28 17:24:46 +0000189#endif
190#endif /* __CONFIG_H */