blob: a64bafed6e4a00b4a30f90199bad9d9dab84e4d3 [file] [log] [blame]
Fabio Estevam419adbf2011-09-06 09:05:43 +00001/*
2 * (C) Copyright 2011 Freescale Semiconductor, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevam419adbf2011-09-06 09:05:43 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Fabio Estevam0208a532012-10-18 18:42:00 +000010#include <asm/arch/imx-regs.h>
11
Fabio Estevam419adbf2011-09-06 09:05:43 +000012/* High Level Configuration Options */
13
Fabio Estevamd6d94e72012-10-23 06:34:48 +000014#define CONFIG_MX25
Fabio Estevam419adbf2011-09-06 09:05:43 +000015#define CONFIG_SYS_TEXT_BASE 0x81200000
Fabio Estevamaf2a4092012-10-23 06:34:49 +000016#define CONFIG_MXC_GPIO
Fabio Estevam419adbf2011-09-06 09:05:43 +000017
Rob Herring3dae5b52013-10-04 10:22:44 -050018#define CONFIG_SYS_TIMER_RATE 32768
19#define CONFIG_SYS_TIMER_COUNTER \
20 (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
21
Fabio Estevam419adbf2011-09-06 09:05:43 +000022#define CONFIG_DISPLAY_CPUINFO
23#define CONFIG_DISPLAY_BOARDINFO
24
25#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
26#define CONFIG_SETUP_MEMORY_TAGS
27#define CONFIG_INITRD_TAG
28
Fabio Estevamf39c0082011-09-22 08:07:15 +000029#define CONFIG_MACH_TYPE MACH_TYPE_MX25_3DS
30
Fabio Estevam419adbf2011-09-06 09:05:43 +000031/* Size of malloc() pool */
32#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
33
34/* Physical Memory Map */
35
36#define CONFIG_NR_DRAM_BANKS 1
37#define PHYS_SDRAM_1 0x80000000
38#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
39
40#define CONFIG_BOARD_EARLY_INIT_F
Fabio Estevame00c89d2012-10-23 06:34:53 +000041#define CONFIG_BOARD_LATE_INIT
Fabio Estevam419adbf2011-09-06 09:05:43 +000042
43#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
Fabio Estevam0208a532012-10-18 18:42:00 +000044#define CONFIG_SYS_INIT_RAM_ADDR IMX_RAM_BASE
45#define CONFIG_SYS_INIT_RAM_SIZE IMX_RAM_SIZE
46
47#define CONFIG_SYS_INIT_SP_OFFSET \
48 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
49#define CONFIG_SYS_INIT_SP_ADDR \
50 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
Fabio Estevam419adbf2011-09-06 09:05:43 +000051
52/* Memory Test */
53#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2)
54#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
55
Fabio Estevam419adbf2011-09-06 09:05:43 +000056/* Serial Info */
57#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010058#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevam419adbf2011-09-06 09:05:43 +000059#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
60#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Fabio Estevam419adbf2011-09-06 09:05:43 +000061
62/* No NOR flash present */
63#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
64#define CONFIG_ENV_SIZE (8 * 1024)
Fabio Estevam419adbf2011-09-06 09:05:43 +000065
66#define CONFIG_SYS_NO_FLASH
Fabio Estevamaf2a4092012-10-23 06:34:49 +000067#define CONFIG_ENV_IS_IN_MMC
68#define CONFIG_SYS_MMC_ENV_DEV 0
Fabio Estevam419adbf2011-09-06 09:05:43 +000069
70/* U-Boot general configuration */
71#define CONFIG_SYS_PROMPT "MX25PDK U-Boot > "
72#define CONFIG_AUTO_COMPLETE
73#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
74/* Print buffer sz */
75#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
76 sizeof(CONFIG_SYS_PROMPT) + 16)
77#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
78/* Boot Argument Buffer Size */
79#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
80#define CONFIG_CMDLINE_EDITING
81#define CONFIG_SYS_LONGHELP
82
83/* U-Boot commands */
84#include <config_cmd_default.h>
Fabio Estevamb874df72012-12-11 11:48:46 +000085#define CONFIG_OF_LIBFDT
Fabio Estevam2dc0fe92012-10-24 09:44:27 +000086#define CONFIG_CMD_BOOTZ
Fabio Estevam419adbf2011-09-06 09:05:43 +000087#define CONFIG_CMD_CACHE
Fabio Estevamaf2a4092012-10-23 06:34:49 +000088#define CONFIG_CMD_MMC
89#define CONFIG_CMD_EXT2
90#define CONFIG_CMD_FAT
Fabio Estevam419adbf2011-09-06 09:05:43 +000091
92/* Ethernet */
93#define CONFIG_FEC_MXC
94#define CONFIG_FEC_MXC_PHYADDR 0x1f
95#define CONFIG_MII
96#define CONFIG_CMD_NET
Fabio Estevam419adbf2011-09-06 09:05:43 +000097#define CONFIG_ENV_OVERWRITE
98
Fabio Estevamaf2a4092012-10-23 06:34:49 +000099/* ESDHC driver */
100#define CONFIG_MMC
101#define CONFIG_GENERIC_MMC
102#define CONFIG_FSL_ESDHC
103#define CONFIG_SYS_FSL_ESDHC_ADDR 0
104#define CONFIG_SYS_FSL_ESDHC_NUM 1
105
Fabio Estevame00c89d2012-10-23 06:34:53 +0000106/* PMIC Configs */
Fabio Estevamcabe2402012-12-11 04:58:02 +0000107#define CONFIG_POWER
108#define CONFIG_POWER_I2C
109#define CONFIG_POWER_FSL
Fabio Estevame00c89d2012-10-23 06:34:53 +0000110#define CONFIG_PMIC_FSL_MC34704
111#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x54
112
Fabio Estevamaf2a4092012-10-23 06:34:49 +0000113#define CONFIG_DOS_PARTITION
114
Fabio Estevame00c89d2012-10-23 06:34:53 +0000115/* I2C Configs */
116#define CONFIG_CMD_I2C
tremb089d032013-09-21 18:13:36 +0200117#define CONFIG_SYS_I2C
118#define CONFIG_SYS_I2C_MXC
119#define CONFIG_SYS_SPD_BUS_NUM 0 /* I2C1 */
Fabio Estevame00c89d2012-10-23 06:34:53 +0000120
Benoît Thébaudeaud37b3342013-03-22 09:30:29 +0000121/* RTC */
122#define CONFIG_RTC_IMXDI
123#define CONFIG_CMD_DATE
124
Fabio Estevame00c89d2012-10-23 06:34:53 +0000125/* Ethernet Configs */
126
127#define CONFIG_CMD_PING
128#define CONFIG_CMD_DHCP
129#define CONFIG_CMD_MII
130#define CONFIG_CMD_NET
131
Fabio Estevamd941e6b2012-11-16 05:09:08 +0000132#define CONFIG_BOOTDELAY 1
Fabio Estevam419adbf2011-09-06 09:05:43 +0000133
134#define CONFIG_LOADADDR 0x81000000 /* loadaddr env var */
135#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
136
137#define CONFIG_EXTRA_ENV_SETTINGS \
138 "script=boot.scr\0" \
139 "uimage=uImage\0" \
140 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
141 "root=/dev/nfs " \
142 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
143 "bootcmd=run netargs; dhcp ${uimage}; bootm\0" \
144
145#endif /* __CONFIG_H */