| Andreas Färber | 1a87cc7 | 2019-10-09 16:03:54 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2019 BayLibre, SAS |
| 4 | * Author: Neil Armstrong <narmstrong@baylibre.com> |
| 5 | * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com> |
| 6 | */ |
| 7 | |
| 8 | /dts-v1/; |
| 9 | |
| 10 | #include "meson-g12b-a311d.dtsi" |
| 11 | #include "meson-khadas-vim3.dtsi" |
| 12 | #include "meson-g12b-khadas-vim3.dtsi" |
| 13 | |
| 14 | / { |
| 15 | compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b"; |
| 16 | }; |
| Jerome Brunet | dd5f235 | 2020-03-05 12:12:38 +0100 | [diff] [blame] | 17 | |
| 18 | /* |
| 19 | * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential |
| 20 | * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between |
| 21 | * an USB3.0 Type A connector and a M.2 Key M slot. |
| 22 | * The PHY driving these differential lines is shared between |
| 23 | * the USB3.0 controller and the PCIe Controller, thus only |
| 24 | * a single controller can use it. |
| 25 | * If the MCU is configured to mux the PCIe/USB3.0 differential lines |
| 26 | * to the M.2 Key M slot, uncomment the following block to disable |
| 27 | * USB3.0 from the USB Complex and enable the PCIe controller. |
| 28 | * The End User is not expected to uncomment the following except for |
| 29 | * testing purposes, but instead rely on the firmware/bootloader to |
| 30 | * update these nodes accordingly if PCIe mode is selected by the MCU. |
| 31 | */ |
| 32 | /* |
| 33 | &pcie { |
| 34 | status = "okay"; |
| 35 | }; |
| 36 | |
| 37 | &usb { |
| 38 | phys = <&usb2_phy0>, <&usb2_phy1>; |
| 39 | phy-names = "usb2-phy0", "usb2-phy1"; |
| 40 | }; |
| 41 | */ |