blob: 9d8e9f7ade3dd4164b2bae61f2ab0d1ca619d683 [file] [log] [blame]
Andy Yan2c1e11d2017-06-01 18:00:55 +08001/*
2 * (C) Copyright 2015 Rockchip Electronics Co., Ltd
3 * Author: Andy Yan <andy.yan@rock-chips.com>
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <errno.h>
10#include <sysreset.h>
11#include <asm/io.h>
12#include <asm/arch/clock.h>
13#include <asm/arch/cru_rv1108.h>
14#include <asm/arch/hardware.h>
15#include <linux/err.h>
16
17int rv1108_sysreset_request(struct udevice *dev, enum sysreset_t type)
18{
19 struct rv1108_cru *cru = rockchip_get_cru();
20
21 if (IS_ERR(cru))
22 return PTR_ERR(cru);
23
24 switch (type) {
25 case SYSRESET_WARM:
26 writel(0xeca8, &cru->glb_srst_snd_val);
27 break;
28 case SYSRESET_COLD:
29 writel(0xfdb9, &cru->glb_srst_fst_val);
30 break;
31 default:
32 return -EPROTONOSUPPORT;
33 }
34
35 return -EINPROGRESS;
36}
37
38static struct sysreset_ops rv1108_sysreset = {
39 .request = rv1108_sysreset_request,
40};
41
42U_BOOT_DRIVER(sysreset_rv1108) = {
43 .name = "rv1108_sysreset",
44 .id = UCLASS_SYSRESET,
45 .ops = &rv1108_sysreset,
46};