| Bin Meng | de9ac9a | 2017-08-15 22:41:58 -0700 | [diff] [blame^] | 1 | # |
| 2 | # Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com> | ||||
| 3 | # | ||||
| 4 | # SPDX-License-Identifier: GPL-2.0+ | ||||
| 5 | # | ||||
| 6 | |||||
| 7 | config INTEL_BRASWELL | ||||
| 8 | bool | ||||
| 9 | select HAVE_FSP | ||||
| 10 | select ARCH_MISC_INIT | ||||
| 11 | select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED | ||||
| 12 | imply HAVE_INTEL_ME | ||||
| 13 | imply HAVE_VBT | ||||
| 14 | imply ENABLE_MRC_CACHE | ||||
| 15 | imply ENV_IS_IN_SPI_FLASH | ||||
| 16 | imply AHCI_PCI | ||||
| 17 | imply ICH_SPI | ||||
| 18 | imply MMC | ||||
| 19 | imply MMC_PCI | ||||
| 20 | imply MMC_SDHCI | ||||
| 21 | imply MMC_SDHCI_SDMA | ||||
| 22 | imply SCSI | ||||
| 23 | imply SPI_FLASH | ||||
| 24 | imply SYS_NS16550 | ||||
| 25 | imply USB | ||||
| 26 | imply USB_XHCI_HCD | ||||
| 27 | imply VIDEO_FSP | ||||
| 28 | |||||
| 29 | if INTEL_BRASWELL | ||||
| 30 | |||||
| 31 | config FSP_ADDR | ||||
| 32 | hex | ||||
| 33 | default 0xfff20000 | ||||
| 34 | |||||
| 35 | config FSP_LOCKDOWN_SPI | ||||
| 36 | bool | ||||
| 37 | default y | ||||
| 38 | |||||
| 39 | endif | ||||