blob: 3147a50853a336ba32031d8c2101d8bd1aa38ccc [file] [log] [blame]
Stephen Warrenfe60f062016-09-13 10:45:58 -06001/*
2 * Copyright (c) 2016, NVIDIA CORPORATION.
3 *
4 * SPDX-License-Identifier: GPL-2.0
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <reset-uclass.h>
10#include <asm/arch/clock.h>
11#include <asm/arch-tegra/clk_rst.h>
12
13static int tegra_car_reset_request(struct reset_ctl *reset_ctl)
14{
15 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
16 reset_ctl->dev, reset_ctl->id);
17
18 /* PERIPH_ID_COUNT varies per SoC */
19 if (reset_ctl->id >= PERIPH_ID_COUNT)
20 return -EINVAL;
21
22 return 0;
23}
24
25static int tegra_car_reset_free(struct reset_ctl *reset_ctl)
26{
27 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
28 reset_ctl->dev, reset_ctl->id);
29
30 return 0;
31}
32
33static int tegra_car_reset_assert(struct reset_ctl *reset_ctl)
34{
35 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
36 reset_ctl->dev, reset_ctl->id);
37
38 reset_set_enable(reset_ctl->id, 1);
39
40 return 0;
41}
42
43static int tegra_car_reset_deassert(struct reset_ctl *reset_ctl)
44{
45 debug("%s(reset_ctl=%p) (dev=%p, id=%lu)\n", __func__, reset_ctl,
46 reset_ctl->dev, reset_ctl->id);
47
48 reset_set_enable(reset_ctl->id, 0);
49
50 return 0;
51}
52
53struct reset_ops tegra_car_reset_ops = {
54 .request = tegra_car_reset_request,
55 .free = tegra_car_reset_free,
56 .rst_assert = tegra_car_reset_assert,
57 .rst_deassert = tegra_car_reset_deassert,
58};
59
60static int tegra_car_reset_probe(struct udevice *dev)
61{
62 debug("%s(dev=%p)\n", __func__, dev);
63
64 return 0;
65}
66
67U_BOOT_DRIVER(tegra_car_reset) = {
68 .name = "tegra_car_reset",
69 .id = UCLASS_RESET,
70 .probe = tegra_car_reset_probe,
71 .ops = &tegra_car_reset_ops,
72};