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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Matthias Weisser39f0023e2011-07-06 00:28:33 +00002/*
3 * (c) 2011 Graf-Syteco, Matthias Weisser
4 * <weisserm@arcor.de>
5 *
6 * Based on tx25.c:
7 * (C) Copyright 2009 DENX Software Engineering
8 * Author: John Rigby <jrigby@gmail.com>
9 *
10 * Based on imx27lite.c:
11 * Copyright (C) 2008,2009 Eric Jarrige <jorasse@users.sourceforge.net>
12 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
13 * And:
14 * RedBoot tx25_misc.c Copyright (C) 2009 Red Hat
Matthias Weisser39f0023e2011-07-06 00:28:33 +000015 */
16#include <common.h>
Simon Glass9edefc22019-11-14 12:57:37 -070017#include <cpu_func.h>
Simon Glass09140112020-05-10 11:40:03 -060018#include <env.h>
Simon Glass52559322019-11-14 12:57:46 -070019#include <init.h>
Simon Glass401d1c42020-10-30 21:38:53 -060020#include <asm/global_data.h>
Stefano Babic7caa6552011-08-21 10:55:05 +020021#include <asm/gpio.h>
Matthias Weisser39f0023e2011-07-06 00:28:33 +000022#include <asm/io.h>
23#include <asm/arch/imx-regs.h>
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000024#include <asm/arch/iomux-mx25.h>
Simon Glassc05ed002020-05-10 11:40:11 -060025#include <linux/delay.h>
Matthias Weisser39f0023e2011-07-06 00:28:33 +000026
27DECLARE_GLOBAL_DATA_PTR;
28
29int board_init()
30{
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000031 static const iomux_v3_cfg_t sdhc1_pads[] = {
32 NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, NO_PAD_CTRL),
33 NEW_PAD_CTRL(MX25_PAD_SD1_CLK__SD1_CLK, NO_PAD_CTRL),
34 NEW_PAD_CTRL(MX25_PAD_SD1_DATA0__SD1_DATA0, NO_PAD_CTRL),
35 NEW_PAD_CTRL(MX25_PAD_SD1_DATA1__SD1_DATA1, NO_PAD_CTRL),
36 NEW_PAD_CTRL(MX25_PAD_SD1_DATA2__SD1_DATA2, NO_PAD_CTRL),
37 NEW_PAD_CTRL(MX25_PAD_SD1_DATA3__SD1_DATA3, NO_PAD_CTRL),
38 };
39
40 static const iomux_v3_cfg_t dig_out_pads[] = {
41 MX25_PAD_CSI_D8__GPIO_1_7, /* Ouput 1 Ctrl */
42 MX25_PAD_CSI_D7__GPIO_1_6, /* Ouput 2 Ctrl */
43 NEW_PAD_CTRL(MX25_PAD_CSI_D6__GPIO_1_31, 0), /* Ouput 1 Stat */
44 NEW_PAD_CTRL(MX25_PAD_CSI_D5__GPIO_1_30, 0), /* Ouput 2 Stat */
45 };
46
47 static const iomux_v3_cfg_t led_pads[] = {
48 MX25_PAD_CSI_D9__GPIO_4_21,
49 MX25_PAD_CSI_D4__GPIO_1_29,
50 };
51
52 static const iomux_v3_cfg_t can_pads[] = {
53 NEW_PAD_CTRL(MX25_PAD_GPIO_A__CAN1_TX, NO_PAD_CTRL),
54 NEW_PAD_CTRL(MX25_PAD_GPIO_B__CAN1_RX, NO_PAD_CTRL),
55 NEW_PAD_CTRL(MX25_PAD_GPIO_C__CAN2_TX, NO_PAD_CTRL),
56 NEW_PAD_CTRL(MX25_PAD_GPIO_D__CAN2_RX, NO_PAD_CTRL),
57 };
58
59 static const iomux_v3_cfg_t i2c3_pads[] = {
60 MX25_PAD_CSPI1_SS1__I2C3_DAT,
61 MX25_PAD_GPIO_E__I2C3_CLK,
62 };
Matthias Weisser39f0023e2011-07-06 00:28:33 +000063
64 icache_enable();
65
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000066 /* Setup of core voltage selection pin to run at 1.4V */
67 imx_iomux_v3_setup_pad(MX25_PAD_EXT_ARMCLK__GPIO_3_15); /* VCORE */
Stefano Babic5fecb362012-08-19 21:33:50 +000068 gpio_direction_output(IMX_GPIO_NR(3, 15), 1);
Matthias Weisser39f0023e2011-07-06 00:28:33 +000069
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000070 /* Setup of SD card pins*/
71 imx_iomux_v3_setup_multiple_pads(sdhc1_pads, ARRAY_SIZE(sdhc1_pads));
Matthias Weisser39f0023e2011-07-06 00:28:33 +000072
73 /* Setup of digital output for USB power and OC */
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000074 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D3__GPIO_1_28); /* USB Power */
Stefano Babic5fecb362012-08-19 21:33:50 +000075 gpio_direction_output(IMX_GPIO_NR(1, 28), 1);
Matthias Weisser39f0023e2011-07-06 00:28:33 +000076
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000077 imx_iomux_v3_setup_pad(MX25_PAD_CSI_D2__GPIO_1_27); /* USB OC */
Stefano Babic5fecb362012-08-19 21:33:50 +000078 gpio_direction_input(IMX_GPIO_NR(1, 18));
Matthias Weisser39f0023e2011-07-06 00:28:33 +000079
80 /* Setup of digital output control pins */
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000081 imx_iomux_v3_setup_multiple_pads(dig_out_pads,
82 ARRAY_SIZE(dig_out_pads));
Matthias Weisser39f0023e2011-07-06 00:28:33 +000083
84 /* Switch both output drivers off */
Stefano Babic5fecb362012-08-19 21:33:50 +000085 gpio_direction_output(IMX_GPIO_NR(1, 7), 0);
86 gpio_direction_output(IMX_GPIO_NR(1, 6), 0);
Matthias Weisser39f0023e2011-07-06 00:28:33 +000087
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000088 /* Setup of key input pin */
89 imx_iomux_v3_setup_pad(NEW_PAD_CTRL(MX25_PAD_KPP_ROW0__GPIO_2_29, 0));
Stefano Babic5fecb362012-08-19 21:33:50 +000090 gpio_direction_input(IMX_GPIO_NR(2, 29));
Matthias Weisser39f0023e2011-07-06 00:28:33 +000091
92 /* Setup of status LED outputs */
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +000093 imx_iomux_v3_setup_multiple_pads(led_pads, ARRAY_SIZE(led_pads));
Matthias Weisser39f0023e2011-07-06 00:28:33 +000094
95 /* Switch both LEDs off */
Stefano Babic5fecb362012-08-19 21:33:50 +000096 gpio_direction_output(IMX_GPIO_NR(4, 21), 0);
97 gpio_direction_output(IMX_GPIO_NR(1, 29), 0);
Matthias Weisser39f0023e2011-07-06 00:28:33 +000098
99 /* Setup of CAN1 and CAN2 signals */
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +0000100 imx_iomux_v3_setup_multiple_pads(can_pads, ARRAY_SIZE(can_pads));
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000101
102 /* Setup of I2C3 signals */
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +0000103 imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000104
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000105 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
106
107 return 0;
108}
109
110int board_late_init(void)
111{
112 const char *e;
113
114#ifdef CONFIG_FEC_MXC
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +0000115/*
116 * FIXME: need to revisit this
117 * The original code enabled PUE and 100-k pull-down without PKE, so the right
118 * value here is likely:
119 * 0 for no pull
120 * or:
121 * PAD_CTL_PUS_100K_DOWN for 100-k pull-down
122 */
123#define FEC_OUT_PAD_CTRL 0
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000124
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +0000125 static const iomux_v3_cfg_t fec_pads[] = {
126 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
127 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
128 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
129 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA0__FEC_TDATA0, FEC_OUT_PAD_CTRL),
130 NEW_PAD_CTRL(MX25_PAD_FEC_TX_EN__FEC_TX_EN, FEC_OUT_PAD_CTRL),
131 NEW_PAD_CTRL(MX25_PAD_FEC_MDC__FEC_MDC, FEC_OUT_PAD_CTRL),
132 MX25_PAD_FEC_MDIO__FEC_MDIO,
133 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
134 NEW_PAD_CTRL(MX25_PAD_FEC_TDATA1__FEC_TDATA1, FEC_OUT_PAD_CTRL),
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000135
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +0000136 MX25_PAD_UPLL_BYPCLK__GPIO_3_16, /* LAN-RESET */
137 MX25_PAD_UART2_CTS__FEC_RX_ER, /* FEC_RX_ERR */
138 };
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000139
Benoît Thébaudeaub597ff62013-05-03 10:32:17 +0000140 imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000141
142 /* assert PHY reset (low) */
Stefano Babic5fecb362012-08-19 21:33:50 +0000143 gpio_direction_output(IMX_GPIO_NR(3, 16), 0);
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000144
145 udelay(5000);
146
147 /* deassert PHY reset */
Stefano Babic5fecb362012-08-19 21:33:50 +0000148 gpio_set_value(IMX_GPIO_NR(3, 16), 1);
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000149
150 udelay(5000);
151#endif
152
Simon Glass00caae62017-08-03 12:22:12 -0600153 e = env_get("gs_base_board");
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000154 if (e != NULL) {
155 if (strcmp(e, "G283") == 0) {
Stefano Babic5fecb362012-08-19 21:33:50 +0000156 int key = gpio_get_value(IMX_GPIO_NR(2, 29));
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000157
158 if (key) {
159 /* Switch on both LEDs to inidcate boot mode */
Stefano Babic5fecb362012-08-19 21:33:50 +0000160 gpio_set_value(IMX_GPIO_NR(1, 29), 0);
161 gpio_set_value(IMX_GPIO_NR(4, 21), 0);
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000162
Simon Glass382bee52017-08-03 12:22:09 -0600163 env_set("preboot", "run gs_slow_boot");
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000164 } else
Simon Glass382bee52017-08-03 12:22:09 -0600165 env_set("preboot", "run gs_fast_boot");
Matthias Weisser39f0023e2011-07-06 00:28:33 +0000166 }
167 }
168
169 return 0;
170}
171
172int dram_init(void)
173{
174 /* dram_init must store complete ramsize in gd->ram_size */
175 gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
176 PHYS_SDRAM_SIZE);
177 return 0;
178}